rabit/CW_A5H_9225_8108
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

DVT

Browse Source
This commit is contained in:
陈春
2025-09-29 16:47:12 +08:00
parent 2d906350bf
commit 0a4832db5e
237 changed files with 0 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

186
A5H_9225_8108_SPIV3.0/CONFIG/bl_ic_config.h
View File

@@ -1,186 +0,0 @@
#ifndef __BL_IC_CONFIG_H__
#define __BL_IC_CONFIG_H__
#include "stdio.h"
#include "stdint.h"
#include "string.h"
#include "stdbool.h"
#define HY8810_CHNEL_NUMBERS 4
#define HY8811_CHNEL_NUMBERS 4
#define HY8603_CHNEL_NUMBERS 8
#define HY8604_CHNEL_NUMBERS 8
#define HY8602_CHNEL_NUMBERS 8
#define HY8822_CHNEL_NUMBERS 4
#define HY8108_CHNEL_NUMBERS 8
#define HY8608_CHNEL_NUMBERS 8
#define HY8612_CHNEL_NUMBERS 12
#define HC_FUNCTION_POWER_ALGORITHM 1
#define A5HP_65_40_22_880_HY8108 1
#define A5HP_75_44_24_1056_HY8108 2
#define A5HP_85_48_28_1344_HY8108 3
#define A5H_85_28_16_448_HY8108 4
#define MODEL_TYPE A5HP_75_44_24_1056_HY8108
#if defined HY8810
#define CH_NUMBERS HY8810_CHNEL_NUMBERS
#define PWM_OFFSET 3
#define BTI_WIDTH 20
#elif defined HY8602
#define CH_NUMBERS HY8602_CHNEL_NUMBERS
#define PWM_OFFSET 3
#define BTI_WIDTH 20
#elif defined HY8811
#define CH_NUMBERS HY8811_CHNEL_NUMBERS
#define PWM_OFFSET 2
#define BTI_WIDTH 20
#elif defined HY8603
#define CH_NUMBERS HY8603_CHNEL_NUMBERS
#define PWM_OFFSET 2
#define BTI_WIDTH 20
#elif defined HY8822
#define CH_NUMBERS HY8822_CHNEL_NUMBERS
#define PWM_OFFSET 0
#define BTI_WIDTH 20
#elif defined HY8612
#define CH_NUMBERS HY8612_CHNEL_NUMBERS
#define PWM_OFFSET 0
#define BTI_WIDTH 16
#elif defined HY8608
#define CH_NUMBERS HY8608_CHNEL_NUMBERS
#define PWM_OFFSET 4
#define BTI_WIDTH 16
#elif defined HY8108
#define CH_NUMBERS HY8108_CHNEL_NUMBERS
#define PWM_OFFSET 4
#define BTI_WIDTH 16
#endif
#if !(HY8810 || HY8602 || HY8811 || HY8603 || HY8822 || HY8612 || HY8608 || HY8108)
#error "no define driver IC"
#endif
#if defined HY8608 || HY8108
#define SERIAL 0
#define HALF_DUPLEX 1
#define COMMUNICATION_MODE SERIAL
#endif
/**********************************************************************************************************/
#if (MODEL_TYPE== A5H_85_28_16_448_HY8108)
#define MAXDIP 12 //Lane<6E><65><EFBFBD><EFBFBD>
#define MAXCASCADE 48 //<2F><>Lane<6E><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define MACHINE_HEIGHT 16 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define MACHINE_WIDTH 28 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define FB_INIT_PWM 300 //<2F><>ʼռ<CABC>ձ<EFBFBD>
#define FB_FREQ 30000 //FB Ƶ<><C6B5>
#define FB_MAX_MV 757 //MAX
#define FB_MIN_MV 0 //MIN
#define FB_SDR_MAX_MV 757
#define FB_SDR_MIN_MV 100
#define FB_HDR_MAX_MV 450
#define FB_HDR_MIN_MV 0
#define DO_MASKS1 0x43ff //PB
#define DO_MASKS2 0x8000 //PD
#define DIP_MASKS 0x9def
#elif (MODEL_TYPE== A5HP_65_40_22_880_HY8108)
#define MAXDIP 10 //Lane<6E><65><EFBFBD><EFBFBD>
#define MAXCASCADE 96 //<2F><>Lane<6E><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define MACHINE_HEIGHT 22 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define MACHINE_WIDTH 40 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define FB_INIT_PWM 212 //<2F><>ʼռ<CABC>ձ<EFBFBD>
#define FB_FREQ 30000 //FB Ƶ<><C6B5>
#define FB_MAX_MV 757 //MAX
#define FB_MIN_MV 0 //MIN
#define FB_SDR_MAX_MV 757
#define FB_SDR_MIN_MV 300
#define FB_HDR_MAX_MV 500
#define FB_HDR_MIN_MV 0
#define DO_MASKS1 0x40ff //PB
#define DO_MASKS2 0x8000 //PD
#define DIP_MASKS 0x91ef
#elif (MODEL_TYPE== A5HP_75_44_24_1056_HY8108)
#define MAXDIP 11 //Lane<6E><65><EFBFBD><EFBFBD>
#define MAXCASCADE 96 //<2F><>Lane<6E><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define MACHINE_HEIGHT 24 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define MACHINE_WIDTH 44 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define FB_INIT_PWM 300 //<2F><>ʼռ<CABC>ձ<EFBFBD>
#define FB_FREQ 30000 //FB Ƶ<><C6B5>
#define FB_MAX_MV 757 //MAX
#define FB_MIN_MV 0 //MIN
#define FB_SDR_MAX_MV 757
#define FB_SDR_MIN_MV 300
#define FB_HDR_MAX_MV 500
#define FB_HDR_MIN_MV 0
#define DO_MASKS1 0x43f7 //PB
#define DO_MASKS2 0x8000 //PD
#define DIP_MASKS 0x9de7
#elif (MODEL_TYPE== A5HP_85_48_28_1344_HY8108)
#define MAXDIP 12 //Lane<6E><65><EFBFBD><EFBFBD>
#define MAXCASCADE 112 //<2F><>Lane<6E><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define MACHINE_HEIGHT 28 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define MACHINE_WIDTH 48 //<2F><><EFBFBD><EFBFBD>Mapping<6E><67><EFBFBD><EFBFBD>
#define FB_INIT_PWM 100 //<2F><>ʼռ<CABC>ձ<EFBFBD>
#define FB_FREQ 30000 //FB Ƶ<><C6B5>
#define FB_MAX_MV 757 //MAX
#define FB_MIN_MV 0//75 //MIN
#define FB_SDR_MAX_MV 757
#define FB_SDR_MIN_MV 300
#define FB_HDR_MAX_MV 500
#define FB_HDR_MIN_MV 0
#define DO_MASKS1 0x43ff //PB
#define DO_MASKS2 0x8000 //PD
#define DIP_MASKS 0x9def
#endif
#define DIP_DIS_COMBINE 0 //0<><30> DIP DIS Independence 1<><31> DIP DIS combine
#define MAXICNO (MAXCASCADE/CH_NUMBERS) //<2F><>Lane IC<49><43><EFBFBD><EFBFBD>
#define ZONESIZE (MACHINE_HEIGHT*MACHINE_WIDTH) //<2F>ܷ<EFBFBD><DCB7><EFBFBD><EFBFBD><EFBFBD>
#define SOC_HEAD_LEN 3
#define SOC_DATA_LEN (ZONESIZE+SOC_HEAD_LEN+1) //SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
#define SOC_DATA_LEN_PRE_PACK 16
#define SOC_RECV_CNT 109//(1+ZONESIZE/SOC_DATA_LEN_PRE_PACK)
#define ROW_NUMER MACHINE_WIDTH // the channel numbers of one row width
#define COLUMN_NUMER MACHINE_HEIGHT // the channel numbers of one column height
/**********************************************************************************************************/
#if defined HY8810 || HY8602 || HY8811 || HY8603 || HY8822
#define PORTOUTBUFSIZE ((MAXCASCADE+7)*20)
#define SHORT_CMD_PORTOUTBUFSIZE ((1+7)*40/2+2)
#elif defined HY8612 || HY8608 || HY8108
#define PORTOUTBUFSIZE ((MAXCASCADE+7)*16)
#define SHORT_CMD_PORTOUTBUFSIZE ((1+7)*32/2+2)
#endif
/*****************************fb params end***********************************************/
#define SW_SMALLDUTY_VALUE 45 //Сduty<74>ж<EFBFBD>
#define CONFIG_TIME 3 //<2F><><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SPB_CMD_INTERVAL 100 //<2F><><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD>ӳ<EFBFBD>ʱ<EFBFBD><CAB1>us
#define LD_MODE MIX_6DC_10HT //<2F><><EFBFBD><EFBFBD>ģʽ
#define SYS_BFI_EN 0 //1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>BFIģʽ 0<><30><EFBFBD>ر<EFBFBD>BFIģʽ
#endif