263 lines
10 KiB
C
263 lines
10 KiB
C
#ifndef __HY8612_H
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#define __HY8612_H
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#ifdef HY8612
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#define CH_NUMBERS 12
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#define PWM_OFFSET 0
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#define BTI_WIDTH 16
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//0x41
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#define TP_NUM_SEL_Pos 0
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#define TP_NUM_SEL_14BIT_TP 0
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#define TP_NUM_SEL_13BIT_TP 1
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#define TP_NUM_SEL_12BIT_TP 2
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#define TP_NUM_SEL_11BIT_TP 3
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#define TP_NUM_SEL_10BIT_TP 4
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#define TP_NUM_SEL_9BIT_TP 5
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#define TP_NUM_SEL_8BIT_TP 6
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#define TP_NUM_SEL_6BIT_TP 7
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#define TP_NUM_SEL (TP_NUM_SEL_14BIT_TP<<TP_NUM_SEL_Pos)
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#define HT_DITHER_NUM_Pos 4
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#define HT_DITHER_NUM_0BIT_DITHER 0
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#define HT_DITHER_NUM_1BIT_DITHER 1
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#define HT_DITHER_NUM_2BIT_DITHER 2
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#define HT_DITHER_NUM_3BIT_DITHER 3
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#define HT_DITHER_NUM_4BIT_DITHER 4
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#define HT_DITHER_NUM_5BIT_DITHER 5
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#define HT_DITHER_NUM_6BIT_DITHER 6
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#define HT_DITHER_NUM (HT_DITHER_NUM_0BIT_DITHER<<HT_DITHER_NUM_Pos)
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//0x47
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#define HEADROOM_Pos 0
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#define HEADROOM_150MV 0
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#define HEADROOM_200MV 1
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#define HEADROOM_300MV 2
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#define HEADROOM_400MV 3
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#define HEADROOM_450MV 4
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#define HEADROOM_500MV 5
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#define HEADROOM_550MV 6
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#define HEADROOM_600MV 7
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#define HEADROOM_700MV 8
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#define HEADROOM_750MV 9
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#define HEADROOM_800MV 10
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#define HEADROOM_900MV 11
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#define HEADROOM_1000MV 12
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#define HEADROOM_1100MV 13
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#define HEADROOM_1200MV 14
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#define HEADROOM_1300MV 15
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#define HEADROOM (HEADROOM_500MV<<HEADROOM_Pos) //headroomÉèÖÃ
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//0x48
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#define CLK_DIP_ALWAYS_ON_Pos 0
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#define CLK_DIP_ALWAYS_ON (0<<CLK_DIP_ALWAYS_ON_Pos)
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#define CLK_DIS_ALWAYS_ON_Pos 1
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#define CLK_DIS_ALWAYS_ON (0<<CLK_DIS_ALWAYS_ON_Pos)
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#define OPEN_LV_Pos 2
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#define OPEN_LV_50MV 0
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#define OPEN_LV_80MV 1
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#define OPEN_LV_100MV 2
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#define OPEN_LV_130MV 3
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#define OPEN_LV (OPEN_LV_80MV<<OPEN_LV_Pos) //ÉèÖÃopen¼ì²âãÐÖµµçѹ
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#define RISE_FALL_Pos 4
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#define RISE_FALL_TIME_0_3US 0
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#define RISE_FALL_TIME_0_6US 1
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#define RISE_FALL_TIME_1US 2
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#define RISE_FALL_TIME_1_6US 3
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#define RISE_FALL_TIME (RISE_FALL_TIME_1_6US<<RISE_FALL_Pos) //ÉèÖÃÉÏÉýÑØ/ϽµÑØʱ¼ä
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#define BURST_Pos 9
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#define BURST_DIS 0
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#define BURST_EN 1
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#define BURST (BURST_DIS<<BURST_Pos) //DC*133%
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#define OPEN_DEBOUNCE_TIME_Pos 13
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#define OPEN_DEBOUNCE_TIME_3_TPWM 0
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#define OPEN_DEBOUNCE_TIME_4_TPWM 1
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#define OPEN_DEBOUNCE_TIME_8_TPWM 2
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#define OPEN_DEBOUNCE_TIME_16_TPWM 3
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#define OPEN_DEBOUNCE_TIME_32_TPWM 4
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#define OPEN_DEBOUNCE_TIME_64_TPWM 5
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#define OPEN_DEBOUNCE_TIME_96_TPWM 6
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#define OPEN_DEBOUNCE_TIME_128_TPWM 7
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#define OPEN_DEBOUNCE_TIME (OPEN_DEBOUNCE_TIME_16_TPWM<<OPEN_DEBOUNCE_TIME_Pos) //ÉèÖÃopen¹ÊÕϼì²âµÄʱ¼ä
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//0x49
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#define READ_BACK_EOP_DOS_FRE_Pos 11
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#define READ_BACK_EOP_DOS_FRE_500K 0
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#define READ_BACK_EOP_DOS_FRE_1M 1
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#define READ_BACK_EOP_DOS_FRE_2M 2
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#define READ_BACK_EOP_DOS_FRE_3M 3
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#define READ_BACK_EOP_DOS_FRE (READ_BACK_EOP_DOS_FRE_2M << READ_BACK_EOP_DOS_FRE_Pos)
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#define UART_TC_FREQ_Pos 13
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#define UART_TC_FREQ_19200 0
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#define UART_TC_FREQ_38400 1
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#define UART_TC_FREQ_57600 2
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#define UART_TC_FREQ_115200 4
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#define UART_TC_FREQ_230400 5
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#define UART_TC_FREQ_460800 6
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#define UART_TC_FREQ_921600 7
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#define UART_TC_FREQ (UART_TC_FREQ_115200<<UART_TC_FREQ_Pos)
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//0x4A
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#define OTP_LV_Pos 1
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#define OTP_LV_155 0
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#define OTP_LV_145 1
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#define OTP_LV_135 2
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#define OTP_LV_125 3
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#define OTP_LV (OTP_LV_145<<OTP_LV_Pos) //ÉèÖÃOTP´¥·¢ãÐÖµ
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#define OTP_RECOVERY_Pos 3
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#define OTP_RECOVERY_155 0
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#define OTP_RECOVERY_145 1
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#define OTP_RECOVERY_135 2
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#define OTP_RECOVERY_125 3
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#define OTP_RECOVERY (OTP_RECOVERY_145<<OTP_RECOVERY_Pos) //ÉèÖÃOTP»Ö¸´ãÐÖµ
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#define SPIKE_FILTER_Pos 5
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#define SPIKE_FILTER_2P2NS 0
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#define SPIKE_FILTER_4P2NS 1
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#define SPIKE_FILTER (SPIKE_FILTER_2P2NS<<SPIKE_FILTER_Pos) //ÊäÈëÐźŵļâ·å¹ýÂËʱ¼äÉèÖÃ
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#define SPIKE_EN_Pos 6
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#define SPIKE_EN_BYPASS 0
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#define SPIKE_EN_ENABLE 1
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#define SPIKE_EN (SPIKE_EN_BYPASS<<SPIKE_EN_Pos) //ÊÇ·ñʹÄÜÊäÈëÐźŵļâ·å¹ýÂ˹¦ÄÜ
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#define DEGLITCH_TIME_Pos 7
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#define DEGLITCH_TIME_2TOSC 0
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#define DEGLITCH_TIME_4TOSC 1
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#define DEGLITCH_TIME_8TOSC 2
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#define DEGLITCH_TIME_32TOSC 3
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#define DEGLITCH_TIME (DEGLITCH_TIME_2TOSC<<DEGLITCH_TIME_Pos) //ÉèÖÃditherµÄλÊý
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#define ANALOG_MOP_Pos 10
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#define ANALOG_100 0
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#define ANALOG_75 1
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#define ANALOG_50 2
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#define ANALOG_25 3
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#define ANALOG_MOP (ANALOG_100<<ANALOG_MOP_Pos)
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//0x4C
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#define CHANNEL_GPOUPING_Pos 0
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#define CHANNEL_GROUP_NO 0
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#define CHANNEL_GROUP_2_CHANNEL 1
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#define CHANNEL_GROUP_4_CHANNEL 2
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#define CHANNEL_GPOUPING (CHANNEL_GROUP_NO<<CHANNEL_GPOUPING_Pos)
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#define FAULT_DEGLITCH_TIME_Pos 3
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#define FAULT_DEGLITCH_TIME_0P5US 0
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#define FAULT_DEGLITCH_TIME_1US 1
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#define FAULT_DEGLITCH_TIME_2US 2
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#define FAULT_DEGLITCH_TIME_3US 3
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#define FAULT_DEGLITCH_TIME (FAULT_DEGLITCH_TIME_1US<<FAULT_DEGLITCH_TIME_Pos)
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#define DOS_OUTPUT_Pos 5
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#define DOS_HIZ 0
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#define DOS_OUTPUT 1
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#define DOS_OUTPUT_MODE (DOS_OUTPUT<<DOS_OUTPUT_Pos)
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#define OH_DERATING_INC_STEP_Pos 6
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#define OH_DERATING_INC_STEP 0
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#define FAULT_BLANK_TIME_Pos 10
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#define FAULT_BLANK_TIME (0<<FAULT_BLANK_TIME_Pos) //BLANK timeÉèÖÃ
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//0x4D
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#define OH_TRIGGER_Pos 0
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#define OH_TRIGGER_VALUT (8<<OH_TRIGGER_Pos) //145-5*N
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#define OH_RECOVER_Pos 5
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#define OH_RECOVER_VALUT (10<<OH_RECOVER_Pos) //145-5*N
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#define OH_DERATING_DEC_STEP_Pos 10
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#define OH_DERATING_DEC_STEP (0<<OH_DERATING_DEC_STEP_Pos)
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#define OH_DERATING_ADJUST_FREQ_Pos 14
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#define OH_DERATING_ADJUST_FREQ_4 0
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#define OH_DERATING_ADJUST_FREQ_16 0
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#define OH_DERATING_ADJUST_FREQ_64 0
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#define OH_DERATING_ADJUST_FREQ_128 0
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#define OH_DERATING_ADJUST_FREQ (OH_DERATING_ADJUST_FREQ_4<<OH_DERATING_ADJUST_FREQ_Pos)
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//0x4E
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#define PWM_CHANNEL_CLOCK_Pos 0
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#define PWM_CHANNEL_CLOCK_3P84K 0
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#define PWM_CHANNEL_CLOCK (PWM_CHANNEL_CLOCK_3P84K << PWM_CHANNEL_CLOCK_Pos)
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#define PWM_CHANNEL_CLOCK_20K_Pos 8
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#define PWM_CHANNEL_CLOCK_20K_EN 1
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#define PWM_CHANNEL_CLOCK_20K_DIS 0
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#define PWM_CHANNEL_CLOCK_20K (PWM_CHANNEL_CLOCK_20K_EN << PWM_CHANNEL_CLOCK_20K_Pos)
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#define SHORT_LV_Pos 9
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#define SHORT_LV_2V 0
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#define SHORT_LV_3V 1
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#define SHORT_LV_4V 2
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#define SHORT_LV_5V 3
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#define SHORT_LV_6V 4
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#define SHORT_LV_7V 5
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#define SHORT_LV_9V 6
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#define SHORT_LV_12V 7
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#define SHORT_LV (SHORT_LV_12V<<SHORT_LV_Pos) //ÉèÖöÌ·ãÐÖµ
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#define OPEN_DEBOUNCE_Pos 12
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#define OPEN_DEBOUNCE_SEL_EOP 0
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#define OPEN_DEBOUNCE_SEL_PWM 1
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#define OPEN_DEBOUNCE (OPEN_DEBOUNCE_SEL_EOP<<OPEN_DEBOUNCE_Pos) //ÉèÖÃopen¼ì²â²Î¿¼EOP»¹ÊÇPWM
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#define BFI_MODE_Pos 13
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#define BFI_RESERVE_FIRST 0
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#define BFI_BLANK_FIRST 1
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#define BFI_MODE (BFI_RESERVE_FIRST<<BFI_MODE_Pos) //BFIģʽÉèÖÃ
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#define BFI_Pos 14
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#define BFI_ENABLE 1
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#define BFI_DISABLE 0
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#define BFI (BFI_DISABLE<<BFI_Pos) //ÊÇ·ñ¿ªÆôBFIģʽ
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#define SLEEP_MODE_EXIT_Pos 15
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#define SLEEP_MODE_EXIT_NO_RECOVERY 0
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#define SLEEP_MODE_EXIT_RECOVERY 1
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#define SLEEP_MODE_EXIT (SLEEP_MODE_EXIT_RECOVERY<<SLEEP_MODE_EXIT_Pos) //Í˳ö˯Ãßģʽʱ£¬ÊÇ·ñ»Ö¸´ÉÏÒ»Ö¡µÄÁÁ¶ÈÊý¾Ý
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//0x4F
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#define BFI_NUMBER_Pos 0
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#define BFI_NUMBER (1<<BFI_NUMBER_Pos) //9BITS BFIÉèÖõÄPWM¸öÊý
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//0x7B
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#define GLOBAL_DAC_Pro 0
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#define GLOBAL_DAC (32<<GLOBAL_DAC_Pro) //12+N*0.57ma
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//0x46
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#define SICK_FAULT_DISABLE 0 // 0:Enable sick dection 1:Disable sick dection
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#define OPEN_FALUT_DISABLE 0 // 0:Enable open dection 1:Disable open dection
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#define SHORT_FAULT_DISABLE 0 // 0:Enable short dection 1:Disable short dection
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#define OTP_FAULT_DISABLE 0 // 0:Enable OTP dection 1:Disable OTP dection
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#define OTP_OFF_DISABLE 0 // 0:Turn off pwm when OTP 1:not turn off pwm when OTP
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#define OTP_REC_DISABLE 0 // 0:recovery pwm when OTP relieve 1:not auto recovery pwm when OTP relieve
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#define OPEN_OFF_DISABLE 1 // 0:turn off pwm when open fault detected 1:not turn off pwm when open fault detected
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#define SHORT_OFF_DISABLE 0 // 0:turn off pwm when short fault detected 1:not turn off pwm when short fault detected
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#define DIP_CRC_CHECK_DISABLE 0 // 0:enable double-wire CRC check 1:disable double-wire CRC check
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#define PWM_HIGH_TIME_FAULT_DISABLE 0 // 0:enable pwm high time detect function 1:disable pwm high time detect function
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#define OH_DISABLE 0
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#define SICK_RANGE_SEL 0 // 0:sick detection related to open 1:sick detection not related to open
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#define DIS_DOS_CRC 0 // 0:enable dis-dos communication CRC check 1:disable dis-dos communication CRC check
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#define OH_DERATING_ENABLE 0
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#define CONFIG_DONE 1
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#endif
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#endif
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