1328 lines
30 KiB
Plaintext
1328 lines
30 KiB
Plaintext
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/*
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* Allwinner Technology CO., Ltd. sun8iw21p1 soc board.
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*
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* soc board support.
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*/
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/dts-v1/;
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#include "sun8iw21p1.dtsi"
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/{
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compatible = "allwinner,sun8iw21p1", "arm,sun8iw21p1", "allwinner,v851s";
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soc@03000000 {
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wlan: wlan@0 {
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compatible = "xradio,wlan";
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wlan_data_rd = <&pio PD 21 0 0x1 0x2 0>;
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wlan_data_irq =<&pio PD 20 0x14 0x0 0x2 0>;
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status = "okay";
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linux,phandle = <0x00000120>;
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phandle = <0x00000120>;
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};
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vind0:vind@0 {
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vind0_clk = <200000000>;
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status = "okay";
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csi2:csi@2 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&ncsi_pins_a>;
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pinctrl-1 = <&ncsi_pins_b>;
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status = "disabled";
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};
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tdm0:tdm@0 {
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work_mode = <1>;
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};
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isp00:isp@0 {
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work_mode = <1>;
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};
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scaler00:scaler@0 {
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work_mode = <1>;
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};
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scaler10:scaler@4 {
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work_mode = <1>;
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};
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scaler20:scaler@8 {
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work_mode = <1>;
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};
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scaler30:scaler@12 {
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work_mode = <1>;
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};
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actuator0:actuator@0 {
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device_type = "actuator0";
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actuator0_name = "ad5820_act";
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actuator0_slave = <0x18>;
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actuator0_af_pwdn = <>;
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actuator0_afvdd = "afvcc-csi";
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actuator0_afvdd_vol = <2800000>;
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status = "disabled";
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};
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flash0:flash@0 {
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device_type = "flash0";
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flash0_type = <2>;
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flash0_en = <>;
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flash0_mode = <>;
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flash0_flvdd = "";
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flash0_flvdd_vol = <>;
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status = "disabled";
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};
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sensor0:sensor@0 {
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device_type = "sensor0";
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sensor0_mname = "gc2053_mipi";
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sensor0_twi_cci_id = <1>;
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sensor0_twi_addr = <0x6e>;
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sensor0_mclk_id = <0>;
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sensor0_pos = "rear";
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sensor0_isp_used = <1>;
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sensor0_fmt = <1>;
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sensor0_stby_mode = <0>;
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sensor0_vflip = <0>;
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sensor0_hflip = <0>;
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sensor0_iovdd-supply = <>;
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sensor0_iovdd_vol = <1800000>;
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sensor0_avdd-supply = <>;
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sensor0_avdd_vol = <2800000>;
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sensor0_dvdd-supply = <>;
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sensor0_dvdd_vol = <1200000>;
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sensor0_power_en = <>;
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sensor0_reset = <&pio PE 6 1 0 1 0>;
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sensor0_pwdn = <&pio PE 7 1 0 1 0>;
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/*sensor0_sm_hs = <&pio PE 2 1 0 1 0>;*/
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/*sensor0_sm_vs = <&pio PE 3 1 0 1 0>;*/
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flash_handle = <&flash0>;
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act_handle = <&actuator0>;
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status = "okay";
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};
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sensor1:sensor@1 {
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device_type = "sensor1";
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sensor1_mname = "gc2053_mipi_2";
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sensor1_twi_cci_id = <0>;
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sensor1_twi_addr = <0x6e>;
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sensor1_mclk_id = <1>;
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sensor1_pos = "front";
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sensor1_isp_used = <1>;
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sensor1_fmt = <1>;
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sensor1_stby_mode = <0>;
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sensor1_vflip = <0>;
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sensor1_hflip = <0>;
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sensor1_iovdd-supply = <>;
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sensor1_iovdd_vol = <1800000>;
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sensor1_avdd-supply = <>;
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sensor1_avdd_vol = <2800000>;
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sensor1_dvdd-supply = <>;
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sensor1_dvdd_vol = <1200000>;
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sensor1_power_en = <>;
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sensor1_reset = <&pio PE 8 1 0 1 0>;
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sensor1_pwdn = <&pio PA 9 1 0 1 0>;
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/*sensor1_sm_hs = <&pio PE 2 1 0 1 0>;*/
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/*sensor1_sm_vs = <&pio PE 3 1 0 1 0>;*/
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flash_handle = <>;
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act_handle = <>;
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status = "okay";
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};
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vinc00:vinc@0 {
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vinc0_csi_sel = <0>;
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vinc0_mipi_sel = <0>;
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vinc0_isp_sel = <0>;
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vinc0_isp_tx_ch = <0>;
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vinc0_tdm_rx_sel = <0>;
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vinc0_rear_sensor_sel = <0>;
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vinc0_front_sensor_sel = <0>;
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vinc0_sensor_list = <0>;
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work_mode = <0x1>;
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status = "okay";
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};
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vinc01:vinc@1 {
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vinc1_csi_sel = <1>;
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vinc1_mipi_sel = <1>;
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vinc1_isp_sel = <1>;
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vinc1_isp_tx_ch = <0>;
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vinc1_tdm_rx_sel = <1>;
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vinc1_rear_sensor_sel = <1>;
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vinc1_front_sensor_sel = <1>;
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vinc1_sensor_list = <0>;
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status = "okay";
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};
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vinc02:vinc@2 {
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vinc2_csi_sel = <2>;
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vinc2_mipi_sel = <0xff>;
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vinc2_isp_sel = <2>;
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vinc2_isp_tx_ch = <2>;
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vinc2_tdm_rx_sel = <2>;
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vinc2_rear_sensor_sel = <0>;
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vinc2_front_sensor_sel = <0>;
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vinc2_sensor_list = <0>;
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status = "disabled";
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};
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vinc03:vinc@3 {
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vinc3_csi_sel = <0>;
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vinc3_mipi_sel = <0xff>;
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vinc3_isp_sel = <0>;
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vinc3_isp_tx_ch = <0>;
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vinc3_tdm_rx_sel = <0>;
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vinc3_rear_sensor_sel = <1>;
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vinc3_front_sensor_sel = <1>;
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vinc3_sensor_list = <0>;
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status = "disabled";
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};
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vinc10:vinc@4 {
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vinc4_csi_sel = <0>;
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vinc4_mipi_sel = <0>;
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vinc4_isp_sel = <0>;
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vinc4_isp_tx_ch = <0>;
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vinc4_tdm_rx_sel = <0>;
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vinc4_rear_sensor_sel = <0>;
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vinc4_front_sensor_sel = <0>;
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vinc4_sensor_list = <0>;
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work_mode = <0x1>;
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status = "okay";
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};
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vinc11:vinc@5 {
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vinc5_csi_sel = <1>;
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vinc5_mipi_sel = <1>;
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vinc5_isp_sel = <1>;
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vinc5_isp_tx_ch = <0>;
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vinc5_tdm_rx_sel = <1>;
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vinc5_rear_sensor_sel = <1>;
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vinc5_front_sensor_sel = <1>;
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vinc5_sensor_list = <0>;
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status = "okay";
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};
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vinc12:vinc@6 {
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vinc6_csi_sel = <2>;
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vinc6_mipi_sel = <0xff>;
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vinc6_isp_sel = <0>;
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vinc6_isp_tx_ch = <0>;
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vinc6_tdm_rx_sel = <0>;
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vinc6_rear_sensor_sel = <0>;
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vinc6_front_sensor_sel = <0>;
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vinc6_sensor_list = <0>;
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status = "disabled";
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};
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vinc13:vinc@7 {
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vinc7_csi_sel = <2>;
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vinc7_mipi_sel = <0xff>;
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vinc7_isp_sel = <0>;
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vinc7_isp_tx_ch = <0>;
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vinc7_tdm_rx_sel = <0>;
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vinc7_rear_sensor_sel = <0>;
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vinc7_front_sensor_sel = <0>;
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vinc7_sensor_list = <0>;
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status = "disabled";
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};
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vinc20:vinc@8 {
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vinc8_csi_sel = <0>;
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vinc8_mipi_sel = <0>;
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vinc8_isp_sel = <0>;
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vinc8_isp_tx_ch = <0>;
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vinc8_tdm_rx_sel = <0>;
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vinc8_rear_sensor_sel = <0>;
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vinc8_front_sensor_sel = <0>;
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vinc8_sensor_list = <0>;
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work_mode = <0x1>;
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status = "okay";
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};
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vinc21:vinc@9 {
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vinc9_csi_sel = <1>;
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vinc9_mipi_sel = <1>;
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vinc9_isp_sel = <1>;
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vinc9_isp_tx_ch = <0>;
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vinc9_tdm_rx_sel = <1>;
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vinc9_rear_sensor_sel = <1>;
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vinc9_front_sensor_sel = <1>;
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vinc9_sensor_list = <0>;
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status = "okay";
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};
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vinc22:vinc@10 {
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vinc10_csi_sel = <2>;
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vinc10_mipi_sel = <0xff>;
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vinc10_isp_sel = <0>;
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vinc10_isp_tx_ch = <0>;
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vinc10_tdm_rx_sel = <0>;
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vinc10_rear_sensor_sel = <0>;
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vinc10_front_sensor_sel = <0>;
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vinc10_sensor_list = <0>;
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status = "disabled";
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};
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vinc23:vinc@11 {
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vinc11_csi_sel = <2>;
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vinc11_mipi_sel = <0xff>;
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vinc11_isp_sel = <0>;
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vinc11_isp_tx_ch = <0>;
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vinc11_tdm_rx_sel = <0>;
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vinc11_rear_sensor_sel = <0>;
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vinc11_front_sensor_sel = <0>;
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vinc11_sensor_list = <0>;
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status = "disabled";
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};
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vinc30:vinc@12 {
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vinc12_csi_sel = <0>;
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vinc12_mipi_sel = <0>;
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vinc12_isp_sel = <0>;
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vinc12_isp_tx_ch = <0>;
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vinc12_tdm_rx_sel = <0>;
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vinc12_rear_sensor_sel = <0>;
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vinc12_front_sensor_sel = <0>;
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vinc12_sensor_list = <0>;
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work_mode = <0x1>;
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status = "okay";
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};
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vinc31:vinc@13 {
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vinc13_csi_sel = <1>;
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vinc13_mipi_sel = <1>;
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vinc13_isp_sel = <1>;
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vinc13_isp_tx_ch = <0>;
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vinc13_tdm_rx_sel = <1>;
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vinc13_rear_sensor_sel = <1>;
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vinc13_front_sensor_sel = <1>;
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vinc13_sensor_list = <0>;
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status = "okay";
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};
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vinc32:vinc@14 {
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vinc14_csi_sel = <2>;
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vinc14_mipi_sel = <0xff>;
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vinc14_isp_sel = <0>;
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vinc14_isp_tx_ch = <0>;
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vinc14_tdm_rx_sel = <0>;
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vinc14_rear_sensor_sel = <0>;
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vinc14_front_sensor_sel = <0>;
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vinc14_sensor_list = <0>;
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status = "disabled";
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};
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vinc33:vinc@15 {
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vinc15_csi_sel = <2>;
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vinc15_mipi_sel = <0xff>;
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vinc15_isp_sel = <0>;
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vinc15_isp_tx_ch = <0>;
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vinc15_tdm_rx_sel = <0>;
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vinc15_rear_sensor_sel = <0>;
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vinc15_front_sensor_sel = <0>;
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vinc15_sensor_list = <0>;
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status = "disabled";
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};
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};
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};
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};
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&npu {
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clock-frequency = <348000000>;/*0.93V 348M; 0.96V 348M*/
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};
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&uart0 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&uart0_pins_active>;
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pinctrl-1 = <&uart0_pins_sleep>;
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status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&uart1 {
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
pinctrl-0 = <&uart1_pins_active>;
|
|||
|
|
pinctrl-1 = <&uart1_pins_sleep>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&uart2 {
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
pinctrl-0 = <&uart2_pins_active>;
|
|||
|
|
pinctrl-1 = <&uart2_pins_sleep>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&uart3 {
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
pinctrl-0 = <&uart3_pins_active>;
|
|||
|
|
pinctrl-1 = <&uart3_pins_sleep>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&pio {
|
|||
|
|
uart0_pins_active: uart0@0 {
|
|||
|
|
allwinner,pins = "PH9", "PH10";
|
|||
|
|
allwinner,function = "uart0";
|
|||
|
|
allwinner,muxsel = <5>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
uart0_pins_sleep: uart0@1 {
|
|||
|
|
allwinner,pins = "PH9", "PH10";
|
|||
|
|
allwinner,function = "gpio_in";
|
|||
|
|
allwinner,muxsel = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
uart1_pins_active: uart1@0 {
|
|||
|
|
allwinner,pins = "PG6", "PG7";
|
|||
|
|
allwinner,function = "uart1";
|
|||
|
|
allwinner,muxsel = <4>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
uart1_pins_sleep: uart1@1 {
|
|||
|
|
allwinner,pins = "PG6", "PG7";
|
|||
|
|
allwinner,function = "gpio_in";
|
|||
|
|
allwinner,muxsel = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
uart2_pins_active: uart2@0 {
|
|||
|
|
allwinner,pins = "PA8", "PA9";
|
|||
|
|
allwinner,function = "uart2";
|
|||
|
|
allwinner,muxsel = <6>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
uart2_pins_sleep: uart2@1 {
|
|||
|
|
allwinner,pins = "PA8", "PA9";
|
|||
|
|
allwinner,function = "gpio_in";
|
|||
|
|
allwinner,muxsel = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
uart3_pins_active: uart3@0 {
|
|||
|
|
allwinner,pins = "PH0", "PH1";
|
|||
|
|
allwinner,function = "uart3";
|
|||
|
|
allwinner,muxsel = <5>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
uart3_pins_sleep: uart3@1 {
|
|||
|
|
allwinner,pins = "PH0", "PH1";
|
|||
|
|
allwinner,function = "gpio_in";
|
|||
|
|
allwinner,muxsel = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spi0_pins_a: spi0@0 {
|
|||
|
|
allwinner,pins = "PC0", "PC2", "PC3";
|
|||
|
|
allwinner,pname = "spi0_sclk", "spi0_mosi", "spi0_miso";
|
|||
|
|
allwinner,function = "spi0";
|
|||
|
|
allwinner,muxsel = <4>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spi0_pins_b: spi0@1 {
|
|||
|
|
allwinner,pins = "PC1", "PC5", "PC4";
|
|||
|
|
allwinner,pname = "spi0_cs0", "spi0_hold", "spi0_wp";
|
|||
|
|
allwinner,function = "spi0";
|
|||
|
|
allwinner,muxsel = <4>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>; // only CS should be pulled up
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spi0_pins_c: spi0@2 {
|
|||
|
|
allwinner,pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <7>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spi1_pins_a: spi1@0 {
|
|||
|
|
allwinner,pins = "PF31", "PF24", "PF29",
|
|||
|
|
"PF26", "PF30";
|
|||
|
|
allwinner,pname = "spi0_sclk", "spi0_mosi",
|
|||
|
|
"spi0_miso", "spi0_hold", "spi0_wp";
|
|||
|
|
allwinner,function = "spi0";
|
|||
|
|
allwinner,muxsel = <5>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spi1_pins_b: spi1@1 {
|
|||
|
|
allwinner,pins = "PF25";
|
|||
|
|
allwinner,pname = "spi0_cs0";
|
|||
|
|
allwinner,function = "spi0";
|
|||
|
|
allwinner,muxsel = <5>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>; // only CS should be pulled up
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spi1_pins_c: spi1@2 {
|
|||
|
|
allwinner,pins = "PF24", "PF25", "PF26", "PF29", "PF30", "PF31";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <7>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
spi3_pins_a: spi3@0 {
|
|||
|
|
allwinner,pins = "PH11", "PH12", "PH13";
|
|||
|
|
allwinner,pname = "spi3_sclk", "spi3_mosi",
|
|||
|
|
"spi3_miso";
|
|||
|
|
allwinner,function = "spi3";
|
|||
|
|
allwinner,muxsel = <6>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
spi3_pins_b: spi3@1 {
|
|||
|
|
allwinner,pins = "PH14";
|
|||
|
|
allwinner,pname = "spi3_cs0";
|
|||
|
|
allwinner,function = "spi3";
|
|||
|
|
allwinner,muxsel = <6>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
spi3_pins_c: spi3@2 {
|
|||
|
|
allwinner,pins = "PH11", "PH12", "PH13",
|
|||
|
|
"PH14";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
spif_pins_a: spif0@0 {
|
|||
|
|
allwinner,pins = "PC0", "PC2", "PC3",
|
|||
|
|
"PC6", "PC7", "PC8",
|
|||
|
|
"PC9", "PC10";
|
|||
|
|
allwinner,pname = "spif_clk", "spif_mosi", "spif_miso",
|
|||
|
|
"spif_io4", "spif_io5", "spif_io6",
|
|||
|
|
"spif_io7", "spif_io8";
|
|||
|
|
allwinner,function = "spif";
|
|||
|
|
allwinner,muxsel = <2>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spif_pins_b: spif@1 {
|
|||
|
|
allwinner,pins = "PC1", "PC4", "PC5";
|
|||
|
|
allwinner,pname = "spif_cs0", "spif_wp", "spif_hold";
|
|||
|
|
allwinner,function = "spif";
|
|||
|
|
allwinner,muxsel = <2>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>; // only CS should be pulled up
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spif_pins_c: spif@2 {
|
|||
|
|
allwinner,pins = "PC0", "PC1", "PC2", "PC3", "PC4",
|
|||
|
|
"PC5", "PC6", "PC7", "PC8", "PC9", "PC10";
|
|||
|
|
allwinner,function = "gpio_in";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi0_pins_a: twi0@0 {
|
|||
|
|
allwinner,pins = "PE4", "PE5";
|
|||
|
|
allwinner,pname = "twi0_scl", "twi0_sda";
|
|||
|
|
allwinner,function = "twi0";
|
|||
|
|
allwinner,muxsel = <8>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi0_pins_b: twi0@1 {
|
|||
|
|
allwinner,pins = "PE4", "PE5";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi1_pins_a: twi1@0 {
|
|||
|
|
allwinner,pins = "PE2", "PE3";
|
|||
|
|
allwinner,pname = "twi1_scl", "twi1_sda";
|
|||
|
|
allwinner,function = "twi1";
|
|||
|
|
allwinner,muxsel = <8>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi1_pins_b: twi1@1 {
|
|||
|
|
allwinner,pins = "PE2", "PE3";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi2_pins_a: twi2@0 {
|
|||
|
|
allwinner,pins = "PH5", "PH6";
|
|||
|
|
allwinner,pname = "twi2_scl", "twi2_sda";
|
|||
|
|
allwinner,function = "twi2";
|
|||
|
|
allwinner,muxsel = <4>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi2_pins_b: twi2@1 {
|
|||
|
|
allwinner,pins = "PH5", "PH6";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi3_pins_a: twi3@0 {
|
|||
|
|
allwinner,pins = "PI3", "PI4";
|
|||
|
|
allwinner,pname = "twi3_scl", "twi3_sda";
|
|||
|
|
allwinner,function = "twi3";
|
|||
|
|
allwinner,muxsel = <6>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi3_pins_b: twi3@1 {
|
|||
|
|
allwinner,pins = "PI3", "PI4";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi4_pins_a: twi4@0 {
|
|||
|
|
allwinner,pins = "PI1", "PI2";
|
|||
|
|
allwinner,pname = "twi4_scl", "twi4_sda";
|
|||
|
|
allwinner,function = "twi4";
|
|||
|
|
allwinner,muxsel = <6>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
twi4_pins_b: twi4@1 {
|
|||
|
|
allwinner,pins = "PI1", "PI2";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
dmic_pins_a: dmic@0 {
|
|||
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|||
|
|
allwinner,function = "dmic";
|
|||
|
|
allwinner,muxsel = <6>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
dmic_pins_b: dmic_sleep@0 {
|
|||
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
daudio0_pins_a: daudio0@0 {
|
|||
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|||
|
|
allwinner,function = "i2s0";
|
|||
|
|
allwinner,muxsel = <3>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
daudio0_pins_b: daudio0_sleep@0 {
|
|||
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
daudio1_pins_a: daudio1@0 {
|
|||
|
|
allwinner,pins = "PE7", "PE8", "PE9", "PE10", "PE11";
|
|||
|
|
allwinner,function = "i2s1";
|
|||
|
|
allwinner,muxsel = <7>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
daudio1_pins_b: daudio1_sleep@0 {
|
|||
|
|
allwinner,pins = "PE7", "PE8", "PE9", "PE10", "PE11";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
pwm6_pin_a: pwm6@0 {
|
|||
|
|
pins = "PD7";
|
|||
|
|
function = "pwm6";
|
|||
|
|
muxsel = <3>;
|
|||
|
|
drive-strength = <10>;
|
|||
|
|
bias-pull-up;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
pwm6_pin_b: pwm6@1 {
|
|||
|
|
pins = "PD7";
|
|||
|
|
function = "gpio_in";
|
|||
|
|
muxsel = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
pwm8_pin_a: pwm8@0 {
|
|||
|
|
pins = "PH8";
|
|||
|
|
function = "pwm8";
|
|||
|
|
muxsel = <2>;
|
|||
|
|
drive-strength = <10>;
|
|||
|
|
bias-pull-up;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
pwm8_pin_b: pwm8@1 {
|
|||
|
|
pins = "PH8";
|
|||
|
|
function = "gpio_in";
|
|||
|
|
muxsel = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
pwm11_pin_a: pwm11@0 {
|
|||
|
|
pins = "PD12";
|
|||
|
|
function = "pwm11";
|
|||
|
|
muxsel = <7>;
|
|||
|
|
drive-strength = <10>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
pwm11_pin_b: pwm11@1 {
|
|||
|
|
pins = "PD12";
|
|||
|
|
function = "gpio_in";
|
|||
|
|
muxsel = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
wiegand_pins_a: wiegand@0 {
|
|||
|
|
pins = "PD1", "PD2";
|
|||
|
|
function = "wiegand";
|
|||
|
|
drive-strength = <10>;
|
|||
|
|
muxsel = <0>;
|
|||
|
|
bias-pull-up;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
wiegand_pins_b: wiegand@1 {
|
|||
|
|
pins = "PD1", "PD2";
|
|||
|
|
muxsel = <1>;
|
|||
|
|
function = "io_disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
gmac0_pins_a: gmac0@0 {
|
|||
|
|
allwinner,pins = "PE0", "PE1", "PE2", "PE3",
|
|||
|
|
"PE4", "PE5", "PE6", "PE7",
|
|||
|
|
"PE8", "PE9", "PE10", "PE11",
|
|||
|
|
"PE12", "PE13", "PE14", "PE15";
|
|||
|
|
allwinner,function = "rgmii";
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,muxsel = <3>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
gmac0_pins_b: gmac0@1 {
|
|||
|
|
allwinner,pins = "PE0", "PE1", "PE2", "PE3",
|
|||
|
|
"PE4", "PE5", "PE6", "PE7",
|
|||
|
|
"PE8", "PE9", "PE10", "PE11",
|
|||
|
|
"PE12", "PE13", "PE14", "PE15";
|
|||
|
|
allwinner,function = "gpio_in";
|
|||
|
|
allwinner,drive = <0>;
|
|||
|
|
allwinner,muxsel = <0>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
csi_mclk0_pins_a: csi_mclk0@0 {
|
|||
|
|
allwinner,pins = "PE12";
|
|||
|
|
allwinner,pname = "mipi_csi_mclk0";
|
|||
|
|
allwinner,function = "mipi_csi_mclk0";
|
|||
|
|
allwinner,muxsel = <5>;
|
|||
|
|
allwinner,drive = <2>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
csi_mclk0_pins_b: csi_mclk0@1 {
|
|||
|
|
allwinner,pins = "PE12";
|
|||
|
|
allwinner,pname = "mipi_csi_mclk0";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <2>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
csi_mclk1_pins_a: csi_mclk1@0 {
|
|||
|
|
allwinner,pins = "PE13";
|
|||
|
|
allwinner,pname = "mipi_csi_mclk1";
|
|||
|
|
allwinner,function = "mipi_csi_mclk1";
|
|||
|
|
allwinner,muxsel = <5>;
|
|||
|
|
allwinner,drive = <2>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
csi_mclk1_pins_b: csi_mclk1@1 {
|
|||
|
|
allwinner,pins = "PE13";
|
|||
|
|
allwinner,pname = "mipi_csi_mclk1";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <0xf>;
|
|||
|
|
allwinner,drive = <2>;
|
|||
|
|
allwinner,pull = <0>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
sdc1_pins_a: sdc1@0 {
|
|||
|
|
allwinner,pins = "PE0", "PE1", "PE2",
|
|||
|
|
"PE3", "PE4", "PE5";
|
|||
|
|
allwinner,function = "sdc1";
|
|||
|
|
allwinner,muxsel = <6>;
|
|||
|
|
allwinner,drive = <3>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
sdc1_pins_b: sdc1@1 {
|
|||
|
|
allwinner,pins = "PE0", "PE1", "PE2",
|
|||
|
|
"PE3", "PE4", "PE5";
|
|||
|
|
allwinner,function = "io_disabled";
|
|||
|
|
allwinner,muxsel = <7>;
|
|||
|
|
allwinner,drive = <1>;
|
|||
|
|
allwinner,pull = <1>;
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&spi0 {
|
|||
|
|
clock-frequency = <100000000>;
|
|||
|
|
pinctrl-0 = <&spi0_pins_a &spi0_pins_b>;
|
|||
|
|
pinctrl-1 = <&spi0_pins_c>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
spi_slave_mode = <0>;
|
|||
|
|
spi_dbi_enable = <0>;
|
|||
|
|
spi0_cs_number = <1>;
|
|||
|
|
status = "disabled";
|
|||
|
|
|
|||
|
|
spi_board0 {
|
|||
|
|
device_type = "spi_board0";
|
|||
|
|
compatible = "spi-nor";
|
|||
|
|
spi-max-frequency = <0x05F5E100>;
|
|||
|
|
m25p,fast-read = <1>;
|
|||
|
|
/*individual_lock;*/
|
|||
|
|
reg = <0x0>;
|
|||
|
|
spi-rx-bus-width=<0x04>;
|
|||
|
|
spi-tx-bus-width=<0x04>;
|
|||
|
|
status="disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
spi-nand@0 {
|
|||
|
|
compatible = "spi-nand";
|
|||
|
|
spi-max-frequency=<0x05F5E100>;
|
|||
|
|
reg = <0x0>;
|
|||
|
|
spi-rx-bus-width=<0x04>;
|
|||
|
|
spi-tx-bus-width=<0x04>;
|
|||
|
|
status="disabled";
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&spi1 {
|
|||
|
|
clock-frequency = <100000000>;
|
|||
|
|
pinctrl-0 = <&spi1_pins_a &spi1_pins_b>;
|
|||
|
|
pinctrl-1 = <&spi1_pins_c>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
spi_slave_mode = <0>;
|
|||
|
|
spi_dbi_enable = <1>;
|
|||
|
|
spi1_cs_number = <1>;
|
|||
|
|
status = "disabled";
|
|||
|
|
|
|||
|
|
spi_board1@0 {
|
|||
|
|
device_type = "spi_dbi";
|
|||
|
|
compatible = "sunxi,spidbi";
|
|||
|
|
spi-max-frequency = <0x5f5e100>;
|
|||
|
|
reg = <0x0>;
|
|||
|
|
spi-rx-bus-width = <0x4>;
|
|||
|
|
spi-tx-bus-width = <0x4>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&spif0 {
|
|||
|
|
clock-frequency = <100000000>;
|
|||
|
|
pinctrl-0 = <&spif_pins_a &spif_pins_b>;
|
|||
|
|
pinctrl-1 = <&spif_pins_c>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
//prefetch_read_mode_enabled; /* choose prefect read mode */
|
|||
|
|
//dtr_mode_enabled; /* choose double edge trigger mode */
|
|||
|
|
//dqs_mode_enabled; /* choose dqs mode(nand provide clk mode) */
|
|||
|
|
status = "disabled";
|
|||
|
|
|
|||
|
|
spif-nor {
|
|||
|
|
device_type = "spi_board0";
|
|||
|
|
compatible = "spif-nor";
|
|||
|
|
spi-max-frequency = <0x5f5e100>;
|
|||
|
|
reg = <0x0>;
|
|||
|
|
spi-rx-bus-width = <0x4>;
|
|||
|
|
spi-tx-bus-width = <0x4>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&spi3 {
|
|||
|
|
clock-frequency = <100000000>;
|
|||
|
|
|
|||
|
|
pinctrl-0 = <&spi3_pins_a &spi3_pins_b>;
|
|||
|
|
pinctrl-1 = <&spi3_pins_c>;
|
|||
|
|
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
spi_dbi_enable = <0>;
|
|||
|
|
spi_slave_mode = <0>;
|
|||
|
|
spi3_cs_number = <1>;
|
|||
|
|
status = "okay";
|
|||
|
|
|
|||
|
|
spi_board1 {
|
|||
|
|
device_type = "spi_board1";
|
|||
|
|
compatible = "xradio,xr806";
|
|||
|
|
spi-max-frequency = <50000000>;
|
|||
|
|
reg = <0x00000000>;
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&twi0 {
|
|||
|
|
clock-frequency = <400000>;
|
|||
|
|
pinctrl-0 = <&twi0_pins_a>;
|
|||
|
|
pinctrl-1 = <&twi0_pins_b>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
/* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 0 */
|
|||
|
|
twi_drv_used = <0>;
|
|||
|
|
twi_pkt_interval = <0>;
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&twi1 {
|
|||
|
|
clock-frequency = <400000>;
|
|||
|
|
pinctrl-0 = <&twi1_pins_a>;
|
|||
|
|
pinctrl-1 = <&twi1_pins_b>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
/* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 0 */
|
|||
|
|
twi_drv_used = <0>;
|
|||
|
|
twi_pkt_interval = <0>;
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&twi2 {
|
|||
|
|
clock-frequency = <400000>;
|
|||
|
|
pinctrl-0 = <&twi2_pins_a>;
|
|||
|
|
pinctrl-1 = <&twi2_pins_b>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
/* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 0 */
|
|||
|
|
twi_drv_used = <0>;
|
|||
|
|
twi_pkt_interval = <0>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&twi3 {
|
|||
|
|
clock-frequency = <400000>;
|
|||
|
|
pinctrl-0 = <&twi3_pins_a>;
|
|||
|
|
pinctrl-1 = <&twi3_pins_b>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
/* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 0 */
|
|||
|
|
twi_drv_used = <0>;
|
|||
|
|
twi_pkt_interval = <0>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
/* audio dirver module -> audio codec */
|
|||
|
|
&codec {
|
|||
|
|
/* external-avcc; */
|
|||
|
|
/* avcc-supply = <®_aldo1>; */
|
|||
|
|
avcc-vol = <1800000>; /* uv */
|
|||
|
|
lineout-vol = <31>;
|
|||
|
|
mic1gain = <31>;
|
|||
|
|
mic2gain = <31>;
|
|||
|
|
adcdelaytime = <0>;
|
|||
|
|
/* lineout-single; */
|
|||
|
|
/* mic1-single; */
|
|||
|
|
/* mic2-single; */
|
|||
|
|
pa-pin-max = <1>; /* set pa */
|
|||
|
|
pa-pin-0 = <&pio PE 11 1 1 1 0>;
|
|||
|
|
pa-pin-level-0 = <1>;
|
|||
|
|
pa-pin-msleep-0 = <0>;
|
|||
|
|
tx-hub-en;
|
|||
|
|
rx-sync-en;
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&codec_plat {
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&codec_mach {
|
|||
|
|
status = "okay";
|
|||
|
|
soundcard-mach,cpu {
|
|||
|
|
sound-dai = <&codec_plat>;
|
|||
|
|
};
|
|||
|
|
soundcard-mach,codec {
|
|||
|
|
sound-dai = <&codec>;
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
/* audio dirver module -> DMIC */
|
|||
|
|
&dmic_plat {
|
|||
|
|
rx-chmap = <0x76543210>;
|
|||
|
|
data-vol = <0xB0>;
|
|||
|
|
rxdelaytime = <0>;
|
|||
|
|
pinctrl-used;
|
|||
|
|
pinctrl-names = "default","sleep";
|
|||
|
|
pinctrl-0 = <&dmic_pins_a>;
|
|||
|
|
pinctrl-1 = <&dmic_pins_b>;
|
|||
|
|
rx-sync-en;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&dmic_mach {
|
|||
|
|
status = "disabled";
|
|||
|
|
soundcard-mach,cpu {
|
|||
|
|
sound-dai = <&dmic_plat>;
|
|||
|
|
soundcard-mach,pll-fs = <1>; /* pll freq = 24.576M or 22.5792M * pll-fs */
|
|||
|
|
};
|
|||
|
|
soundcard-mach,codec {
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
/* audio dirver module -> I2S/PCM */
|
|||
|
|
&daudio0_plat {
|
|||
|
|
tdm-num = <0>;
|
|||
|
|
tx-pin = <0>;
|
|||
|
|
rx-pin = <0>;
|
|||
|
|
/* pinctrl-used; */
|
|||
|
|
/* pinctrl-names= "default","sleep"; */
|
|||
|
|
/* pinctrl-0 = <&daudio0_pins_a>; */
|
|||
|
|
/* pinctrl-1 = <&daudio0_pins_b>; */
|
|||
|
|
tx-hub-en;
|
|||
|
|
rx-sync-en;
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&daudio0_mach {
|
|||
|
|
soundcard-mach,format = "i2s";
|
|||
|
|
soundcard-mach,frame-master = <&daudio0_cpu>;
|
|||
|
|
soundcard-mach,bitclock-master = <&daudio0_cpu>;
|
|||
|
|
/* soundcard-mach,frame-inversion; */
|
|||
|
|
/* soundcard-mach,bitclock-inversion; */
|
|||
|
|
soundcard-mach,slot-num = <2>;
|
|||
|
|
soundcard-mach,slot-width = <32>;
|
|||
|
|
status = "okay";
|
|||
|
|
daudio0_cpu: soundcard-mach,cpu {
|
|||
|
|
sound-dai = <&daudio0_plat>;
|
|||
|
|
soundcard-mach,pll-fs = <1>; /* pll freq = 24.576M or 22.5792M * pll-fs */
|
|||
|
|
soundcard-mach,mclk-fs = <0>; /* mclk freq = pcm rate * mclk-fs */
|
|||
|
|
};
|
|||
|
|
daudio0_codec: soundcard-mach,codec {
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&daudio1_plat {
|
|||
|
|
tdm-num = <1>;
|
|||
|
|
tx-pin = <0>;
|
|||
|
|
rx-pin = <0>;
|
|||
|
|
/* pinctrl-used; */
|
|||
|
|
/* pinctrl-names= "default","sleep"; */
|
|||
|
|
/* pinctrl-0 = <&daudio1_pins_a>; */
|
|||
|
|
/* pinctrl-1 = <&daudio1_pins_b>; */
|
|||
|
|
tx-hub-en;
|
|||
|
|
rx-sync-en;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&daudio1_mach {
|
|||
|
|
soundcard-mach,format = "i2s";
|
|||
|
|
soundcard-mach,frame-master = <&daudio1_cpu>;
|
|||
|
|
soundcard-mach,bitclock-master = <&daudio1_cpu>;
|
|||
|
|
/* soundcard-mach,frame-inversion; */
|
|||
|
|
/* soundcard-mach,bitclock-inversion; */
|
|||
|
|
soundcard-mach,slot-num = <2>;
|
|||
|
|
soundcard-mach,slot-width = <32>;
|
|||
|
|
status = "disabled";
|
|||
|
|
daudio1_cpu: soundcard-mach,cpu {
|
|||
|
|
sound-dai = <&daudio1_plat>;
|
|||
|
|
soundcard-mach,pll-fs = <1>; /* pll freq = 24.576M or 22.5792M * pll-fs */
|
|||
|
|
soundcard-mach,mclk-fs = <0>; /* mclk freq = pcm rate * mclk-fs */
|
|||
|
|
};
|
|||
|
|
daudio1_codec: soundcard-mach,codec {
|
|||
|
|
};
|
|||
|
|
};
|
|||
|
|
/* audio dirver module -> END */
|
|||
|
|
|
|||
|
|
&usbc0 {
|
|||
|
|
device_type = "usbc0";
|
|||
|
|
usb_port_type = <0x0>;
|
|||
|
|
usb_detect_type = <0x0>;
|
|||
|
|
usb_detect_mode = <0x0>;
|
|||
|
|
usb_id_gpio;
|
|||
|
|
usb_det_vbus_gpio;
|
|||
|
|
usb_regulator_io = "nocare";
|
|||
|
|
usb_wakeup_suspend = <0x0>;
|
|||
|
|
usb_luns = <0x3>;
|
|||
|
|
usb_serial_unique = <0x0>;
|
|||
|
|
usb_serial_number = "20080411";
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&udc {
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&pwm6 {
|
|||
|
|
pinctrl-names = "active", "sleep";
|
|||
|
|
pinctrl-0 = <&pwm6_pin_a>;
|
|||
|
|
pinctrl-1 = <&pwm6_pin_b>;
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&pwm8 {
|
|||
|
|
pinctrl-names = "active", "sleep";
|
|||
|
|
pinctrl-0 = <&pwm8_pin_a>;
|
|||
|
|
pinctrl-1 = <&pwm8_pin_b>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&gpadc {
|
|||
|
|
channel_num = <1>;
|
|||
|
|
channel_select = <0x01>;
|
|||
|
|
channel_data_select = <0>;
|
|||
|
|
channel_compare_select = <0x01>;
|
|||
|
|
channel_cld_select = <0x01>;
|
|||
|
|
channel_chd_select = <0>;
|
|||
|
|
channel0_compare_lowdata = <1700000>;
|
|||
|
|
channel0_compare_higdata = <1200000>;
|
|||
|
|
channel1_compare_lowdata = <460000>;
|
|||
|
|
channel1_compare_higdata = <1200000>;
|
|||
|
|
key_cnt = <5>;
|
|||
|
|
key0_vol = <210>;
|
|||
|
|
key0_val = <115>;
|
|||
|
|
key1_vol = <410>;
|
|||
|
|
key1_val = <114>;
|
|||
|
|
key2_vol = <590>;
|
|||
|
|
key2_val = <139>;
|
|||
|
|
key3_vol = <750>;
|
|||
|
|
key3_val = <28>;
|
|||
|
|
key4_vol = <880>;
|
|||
|
|
key4_val = <102>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&wiegand {
|
|||
|
|
protocol-type = <0>; /* select protocol-type; 0:26bit, 1:34bit */
|
|||
|
|
signal-duration = <110>; /* duty cycle, range is determined by clock_div */
|
|||
|
|
signal-period = <1178>; /* cycle length, range is determined by clock_div */
|
|||
|
|
high-parity-polar = <0x01>; /* select high parity bit polarity 1:odd parity; 0:even parity */
|
|||
|
|
low-parity-polar = <0x00>; /* select low parity bit polarity 1:odd parity; 0:even parity */
|
|||
|
|
data-polar = <0x01>; /* select the bit polarity 0:normal; 1:inverse */
|
|||
|
|
clock-div = <0x18>; /* set the clock division ratio, range: 0-48 */
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
pinctrl-0 = <&wiegand_pins_a>;
|
|||
|
|
pinctrl-1 = <&wiegand_pins_b>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&gmac0{
|
|||
|
|
phy-mode = "rmii";
|
|||
|
|
use_ephy25m = <1>;
|
|||
|
|
pinctrl-0 = <&gmac0_pins_a>;
|
|||
|
|
pinctrl-1 = <&gmac0_pins_b>;
|
|||
|
|
pinctrl-names = "default", "sleep";
|
|||
|
|
phy-rst = <&pio PD 19 1 1 1 0>;
|
|||
|
|
tx-delay = <7>;
|
|||
|
|
rx-delay = <31>;
|
|||
|
|
disable-az-mode;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&sdc2 {
|
|||
|
|
non-removable;
|
|||
|
|
bus-width = <8>;
|
|||
|
|
mmc-ddr-1_8v;
|
|||
|
|
mmc-hs200-1_8v;
|
|||
|
|
mmc-hs400-1_8v;
|
|||
|
|
no-sdio;
|
|||
|
|
no-sd;
|
|||
|
|
ctl-spec-caps = <0x8>;
|
|||
|
|
cap-mmc-highspeed;
|
|||
|
|
sunxi-power-save-mode;
|
|||
|
|
sunxi-dis-signal-vol-sw;
|
|||
|
|
max-frequency = <100000000>;
|
|||
|
|
/*vmmc-supply = <®_dcdc1>;*/
|
|||
|
|
/*emmc io vol 3.3v*/
|
|||
|
|
/*vqmmc-supply = <®_aldo1>;*/
|
|||
|
|
/*emmc io vol 1.8v*/
|
|||
|
|
/*vqmmc-supply = <®_eldo1>;*/
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&sdc0 {
|
|||
|
|
bus-width = <4>;
|
|||
|
|
cd-gpios = <&pio PF 6 6 1 3 0xffffffff>;
|
|||
|
|
/*non-removable;*/
|
|||
|
|
/*broken-cd;*/
|
|||
|
|
/*cd-inverted*/
|
|||
|
|
/*data3-detect;*/
|
|||
|
|
card-pwr-gpios = <&pio PH 0 1 1 2 0xffffffff>;
|
|||
|
|
cd-used-24M;
|
|||
|
|
cap-sd-highspeed;
|
|||
|
|
sd-uhs-sdr50;
|
|||
|
|
sd-uhs-ddr50;
|
|||
|
|
sd-uhs-sdr104;
|
|||
|
|
no-sdio;
|
|||
|
|
no-mmc;
|
|||
|
|
sunxi-signal-vol-sw-without-pmu;
|
|||
|
|
sunxi-power-save-mode;
|
|||
|
|
/*sunxi-dis-signal-vol-sw;*/
|
|||
|
|
max-frequency = <150000000>;
|
|||
|
|
ctl-spec-caps = <0x408>;
|
|||
|
|
/* vmmc-supply = <®_dcdc1>; */
|
|||
|
|
/* vqmmc33sw-supply = <®_dcdc1>; */
|
|||
|
|
/* vdmmc33sw-supply = <®_dcdc1>; */
|
|||
|
|
/* vqmmc18sw-supply = <®_bldo1>; */
|
|||
|
|
/* vdmmc18sw-supply = <®_bldo1>; */
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&sdc1 {
|
|||
|
|
bus-width = <4>;
|
|||
|
|
no-mmc;
|
|||
|
|
no-sd;
|
|||
|
|
cap-sd-highspeed;
|
|||
|
|
/*sd-uhs-sdr12*/
|
|||
|
|
/*sd-uhs-sdr25*/
|
|||
|
|
/*sd-uhs-sdr50;*/
|
|||
|
|
/*sd-uhs-ddr50;*/
|
|||
|
|
/*sd-uhs-sdr104*/
|
|||
|
|
/*sunxi-power-save-mode;*/
|
|||
|
|
/*sunxi-dis-signal-vol-sw;*/
|
|||
|
|
cap-sdio-irq;
|
|||
|
|
keep-power-in-suspend;
|
|||
|
|
ignore-pm-notify;
|
|||
|
|
max-frequency = <50000000>;
|
|||
|
|
ctl-spec-caps = <0x8>;
|
|||
|
|
pinctrl-0 = <&sdc1_pins_a>;
|
|||
|
|
pinctrl-1 = <&sdc1_pins_b>;
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&disp {
|
|||
|
|
disp_init_enable = <1>;
|
|||
|
|
disp_mode = <0>;
|
|||
|
|
|
|||
|
|
screen0_output_type = <1>;
|
|||
|
|
screen0_output_mode = <4>;
|
|||
|
|
|
|||
|
|
screen1_output_type = <3>;
|
|||
|
|
screen1_output_mode = <10>;
|
|||
|
|
|
|||
|
|
screen1_output_format = <0>;
|
|||
|
|
screen1_output_bits = <0>;
|
|||
|
|
screen1_output_eotf = <4>;
|
|||
|
|
screen1_output_cs = <257>;
|
|||
|
|
screen1_output_range = <2>;
|
|||
|
|
screen1_output_scan = <0>;
|
|||
|
|
screen1_output_aspect_ratio = <8>;
|
|||
|
|
|
|||
|
|
dev0_output_type = <1>;
|
|||
|
|
dev0_output_mode = <4>;
|
|||
|
|
dev0_screen_id = <0>;
|
|||
|
|
dev0_do_hpd = <0>;
|
|||
|
|
|
|||
|
|
dev1_output_type = <4>;
|
|||
|
|
dev1_output_mode = <10>;
|
|||
|
|
dev1_screen_id = <1>;
|
|||
|
|
dev1_do_hpd = <1>;
|
|||
|
|
|
|||
|
|
def_output_dev = <0>;
|
|||
|
|
|
|||
|
|
fb0_format = <0>;
|
|||
|
|
fb0_width = <0>;
|
|||
|
|
fb0_height = <0>;
|
|||
|
|
|
|||
|
|
fb1_format = <0>;
|
|||
|
|
fb1_width = <0>;
|
|||
|
|
fb1_height = <0>;
|
|||
|
|
chn_cfg_mode = <1>;
|
|||
|
|
|
|||
|
|
disp_para_zone = <1>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&dsi4lane_pins_a {
|
|||
|
|
allwinner,pins = "PD1", "PD2", "PD3", "PD4", "PD5", "PD6";
|
|||
|
|
allwinner,pname = "PD1", "PD2", "PD3", "PD4", "PD5", "PD6";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&dsi4lane_pins_b {
|
|||
|
|
allwinner,pins = "PD1", "PD2", "PD3", "PD4", "PD5", "PD6";
|
|||
|
|
allwinner,pname = "PD1", "PD2", "PD3", "PD4", "PD5", "PD6";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&lcd0 {
|
|||
|
|
base_config_start = <1>;
|
|||
|
|
lcd_used = <1>;
|
|||
|
|
|
|||
|
|
lcd_driver_name = "t050k589";
|
|||
|
|
|
|||
|
|
lcd_bl_0_percent = <0>;
|
|||
|
|
lcd_bl_40_percent = <23>;
|
|||
|
|
lcd_bl_100_percent = <100>;
|
|||
|
|
lcd_backlight = <150>;
|
|||
|
|
|
|||
|
|
lcd_if = <4>;
|
|||
|
|
lcd_x = <720>;
|
|||
|
|
lcd_y = <1280>;
|
|||
|
|
lcd_width = <62>;
|
|||
|
|
lcd_height = <110>;
|
|||
|
|
lcd_dclk_freq = <60>;
|
|||
|
|
|
|||
|
|
lcd_pwm_used = <1>;
|
|||
|
|
lcd_pwm_ch = <6>;
|
|||
|
|
lcd_pwm_freq = <50000>;
|
|||
|
|
lcd_pwm_pol = <1>;
|
|||
|
|
lcd_pwm_max_limit = <255>;
|
|||
|
|
|
|||
|
|
lcd_hbp = <32>;
|
|||
|
|
lcd_ht = <780>;
|
|||
|
|
lcd_hspw = <8>;
|
|||
|
|
lcd_vbp = <12>;
|
|||
|
|
lcd_vt = <1304>;
|
|||
|
|
lcd_vspw = <4>;
|
|||
|
|
|
|||
|
|
lcd_dsi_if = <0>;
|
|||
|
|
lcd_dsi_lane = <2>;
|
|||
|
|
lcd_dsi_format = <0>;
|
|||
|
|
lcd_dsi_te = <0>;
|
|||
|
|
lcd_dsi_eotp = <0>;
|
|||
|
|
|
|||
|
|
lcd_frm = <0>;
|
|||
|
|
lcd_io_phase = <0x0000>;
|
|||
|
|
lcd_hv_clk_phase = <0>;
|
|||
|
|
lcd_hv_sync_polarity= <0>;
|
|||
|
|
lcd_gamma_en = <0>;
|
|||
|
|
lcd_bright_curve_en = <0>;
|
|||
|
|
lcd_cmap_en = <0>;
|
|||
|
|
|
|||
|
|
lcdgamma4iep = <22>;
|
|||
|
|
|
|||
|
|
lcd_gpio_0 = <&pio PD 19 1 0 3 1>;
|
|||
|
|
lcd_gpio_1 = <&pio PE 1 1 0 3 1>;
|
|||
|
|
pinctrl-0 = <&dsi4lane_pins_a>;
|
|||
|
|
pinctrl-1 = <&dsi4lane_pins_b>;
|
|||
|
|
base_config_end = <1>;
|
|||
|
|
status = "disabled";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&g2d {
|
|||
|
|
status = "okay";
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
&cpu0 {
|
|||
|
|
vf_tbl_sel = <0>;
|
|||
|
|
};
|