196 lines
9.5 KiB
C
196 lines
9.5 KiB
C
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/*
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* vin_common.h
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*
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* Copyright (c) 2022 by Allwinnertech Co., Ltd. http://www.allwinnertech.com
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*
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* Authors: Zequn Zheng <zequnzhengi@allwinnertech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __SUNXI_MIPI__H_
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#define __SUNXI_MIPI__H_
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#include <sunxi_hal_common.h>
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/* Four-character-code (FOURCC) */
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#define v4l2_fourcc(a, b, c, d)\
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((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))
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/* Parallel flags */
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/*
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* Can the client run in master or in slave mode. By "Master mode" an operation
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* mode is meant, when the client (e.g., a camera sensor) is producing
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* horizontal and vertical synchronisation. In "Slave mode" the host is
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* providing these signals to the slave.
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*/
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#define V4L2_MBUS_MASTER (1 << 0)
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#define V4L2_MBUS_SLAVE (1 << 1)
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/*
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* Signal polarity flags
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* Note: in BT.656 mode HSYNC, FIELD, and VSYNC are unused
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* V4L2_MBUS_[HV]SYNC* flags should be also used for specifying
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* configuration of hardware that uses [HV]REF signals
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*/
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#define V4L2_MBUS_HSYNC_ACTIVE_HIGH (1 << 2)
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#define V4L2_MBUS_HSYNC_ACTIVE_LOW (1 << 3)
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#define V4L2_MBUS_VSYNC_ACTIVE_HIGH (1 << 4)
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#define V4L2_MBUS_VSYNC_ACTIVE_LOW (1 << 5)
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#define V4L2_MBUS_PCLK_SAMPLE_RISING (1 << 6)
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#define V4L2_MBUS_PCLK_SAMPLE_FALLING (1 << 7)
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#define V4L2_MBUS_DATA_ACTIVE_HIGH (1 << 8)
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#define V4L2_MBUS_DATA_ACTIVE_LOW (1 << 9)
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/* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
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#define V4L2_MBUS_FIELD_EVEN_HIGH (1 << 10)
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/* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
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#define V4L2_MBUS_FIELD_EVEN_LOW (1 << 11)
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/* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
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#define V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH (1 << 12)
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#define V4L2_MBUS_VIDEO_SOG_ACTIVE_LOW (1 << 13)
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/* Serial flags */
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/* How many lanes the client can use */
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#define V4L2_MBUS_CSI2_1_LANE (1 << 0)
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#define V4L2_MBUS_CSI2_2_LANE (1 << 1)
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#define V4L2_MBUS_CSI2_3_LANE (1 << 2)
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#define V4L2_MBUS_CSI2_4_LANE (1 << 3)
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/* On which channels it can send video data */
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#define V4L2_MBUS_CSI2_CHANNEL_0 (1 << 4)
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#define V4L2_MBUS_CSI2_CHANNEL_1 (1 << 5)
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#define V4L2_MBUS_CSI2_CHANNEL_2 (1 << 6)
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#define V4L2_MBUS_CSI2_CHANNEL_3 (1 << 7)
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/* Does it support only continuous or also non-continuous clock mode */
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#define V4L2_MBUS_CSI2_CONTINUOUS_CLOCK (1 << 8)
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#define V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK (1 << 9)
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#define V4L2_MBUS_CSI2_LANES (V4L2_MBUS_CSI2_1_LANE | V4L2_MBUS_CSI2_2_LANE | \
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V4L2_MBUS_CSI2_3_LANE | V4L2_MBUS_CSI2_4_LANE)
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#define V4L2_MBUS_CSI2_CHANNELS (V4L2_MBUS_CSI2_CHANNEL_0 | V4L2_MBUS_CSI2_CHANNEL_1 | \
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V4L2_MBUS_CSI2_CHANNEL_2 | V4L2_MBUS_CSI2_CHANNEL_3)
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/**
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* enum v4l2_mbus_type - media bus type
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* @V4L2_MBUS_PARALLEL: parallel interface with hsync and vsync
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* @V4L2_MBUS_BT656: parallel interface with embedded synchronisation, can
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* also be used for BT.1120
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* @V4L2_MBUS_CSI2: MIPI CSI-2 serial interface
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*/
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enum v4l2_mbus_type {
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V4L2_MBUS_PARALLEL = 0,
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V4L2_MBUS_BT656,
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V4L2_MBUS_CSI2,
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};
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/**
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* struct v4l2_mbus_config - media bus configuration
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* @type: in: interface type
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* @flags: in / out: configuration flags, depending on @type
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*/
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struct v4l2_mbus_config {
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enum v4l2_mbus_type type;
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unsigned int flags;
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};
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#define VIDEO_MAX_FRAME 32
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#define VIDEO_MAX_PLANES 8
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enum v4l2_field {
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V4L2_FIELD_ANY = 0, /* driver can choose from none,
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top, bottom, interlaced
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depending on whatever it thinks
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is approximate ... */
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V4L2_FIELD_NONE = 1, /* this device has no fields ... */
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V4L2_FIELD_TOP = 2, /* top field only */
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V4L2_FIELD_BOTTOM = 3, /* bottom field only */
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V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */
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V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one
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buffer, top-bottom order */
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V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */
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V4L2_FIELD_ALTERNATE = 7, /* both fields alternating into
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separate buffers */
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V4L2_FIELD_INTERLACED_TB = 8, /* both fields interlaced, top field
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first and the top field is
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transmitted first */
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V4L2_FIELD_INTERLACED_BT = 9, /* both fields interlaced, top field
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first and the bottom field is
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transmitted first */
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};
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/* Grey formats */
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#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y') /* 8 Greyscale */
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/* Luminance+Chrominance formats */
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#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y', 'V', 'U', '9') /* 9 YVU 4:1:0 */
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#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y', 'V', '1', '2') /* 12 YVU 4:2:0 */
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#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y', 'U', 'Y', 'V') /* 16 YUV 4:2:2 */
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#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y', 'Y', 'U', 'V') /* 16 YUV 4:2:2 */
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#define V4L2_PIX_FMT_YVYU v4l2_fourcc('Y', 'V', 'Y', 'U') /* 16 YVU 4:2:2 */
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#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U', 'Y', 'V', 'Y') /* 16 YUV 4:2:2 */
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#define V4L2_PIX_FMT_VYUY v4l2_fourcc('V', 'Y', 'U', 'Y') /* 16 YUV 4:2:2 */
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#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4', '2', '2', 'P') /* 16 YVU422 planar */
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#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4', '1', '1', 'P') /* 16 YVU411 planar */
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#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y', '4', '1', 'P') /* 12 YUV 4:1:1 */
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#define V4L2_PIX_FMT_YUV444 v4l2_fourcc('Y', '4', '4', '4') /* 16 xxxxyyyy uuuuvvvv */
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#define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y', 'U', 'V', 'O') /* 16 YUV-5-5-5 */
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#define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y', 'U', 'V', 'P') /* 16 YUV-5-6-5 */
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#define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y', 'U', 'V', '4') /* 32 YUV-8-8-8-8 */
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#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y', 'U', 'V', '9') /* 9 YUV 4:1:0 */
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#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y', 'U', '1', '2') /* 12 YUV 4:2:0 */
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#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* 8 8-bit color */
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#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */
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#define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0') /* 12 YUV 4:2:0 2 lines y, 1 line uv interleaved */
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/* two planes -- one Y, one Cr + Cb interleaved */
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#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
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#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */
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#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */
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#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */
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#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */
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#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
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/* two non contiguous planes - one Y, one Cr + Cb interleaved */
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#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */
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#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */
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#define V4L2_PIX_FMT_NV16M v4l2_fourcc('N', 'M', '1', '6') /* 16 Y/CbCr 4:2:2 */
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#define V4L2_PIX_FMT_NV61M v4l2_fourcc('N', 'M', '6', '1') /* 16 Y/CrCb 4:2:2 */
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#define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 macroblocks */
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#define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 macroblocks */
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/* three non contiguous planes - Y, Cb, Cr */
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#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'M', '1', '2') /* 12 YUV420 planar */
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#define V4L2_PIX_FMT_YVU420M v4l2_fourcc('Y', 'M', '2', '1') /* 12 YVU420 planar */
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/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */
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#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */
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#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */
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#define V4L2_PIX_FMT_SGRBG8 v4l2_fourcc('G', 'R', 'B', 'G') /* 8 GRGR.. BGBG.. */
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#define V4L2_PIX_FMT_SRGGB8 v4l2_fourcc('R', 'G', 'G', 'B') /* 8 RGRG.. GBGB.. */
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#define V4L2_PIX_FMT_SBGGR10 v4l2_fourcc('B', 'G', '1', '0') /* 10 BGBG.. GRGR.. */
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#define V4L2_PIX_FMT_SGBRG10 v4l2_fourcc('G', 'B', '1', '0') /* 10 GBGB.. RGRG.. */
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#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0') /* 10 GRGR.. BGBG.. */
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#define V4L2_PIX_FMT_SRGGB10 v4l2_fourcc('R', 'G', '1', '0') /* 10 RGRG.. GBGB.. */
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/* 10bit raw bayer packed, 5 bytes for every 4 pixels */
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#define V4L2_PIX_FMT_SBGGR10P v4l2_fourcc('p', 'B', 'A', 'A')
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#define V4L2_PIX_FMT_SGBRG10P v4l2_fourcc('p', 'G', 'A', 'A')
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#define V4L2_PIX_FMT_SGRBG10P v4l2_fourcc('p', 'g', 'A', 'A')
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#define V4L2_PIX_FMT_SRGGB10P v4l2_fourcc('p', 'R', 'A', 'A')
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/* 10bit raw bayer a-law compressed to 8 bits */
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#define V4L2_PIX_FMT_SBGGR10ALAW8 v4l2_fourcc('a', 'B', 'A', '8')
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#define V4L2_PIX_FMT_SGBRG10ALAW8 v4l2_fourcc('a', 'G', 'A', '8')
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#define V4L2_PIX_FMT_SGRBG10ALAW8 v4l2_fourcc('a', 'g', 'A', '8')
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#define V4L2_PIX_FMT_SRGGB10ALAW8 v4l2_fourcc('a', 'R', 'A', '8')
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/* 10bit raw bayer DPCM compressed to 8 bits */
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#define V4L2_PIX_FMT_SBGGR10DPCM8 v4l2_fourcc('b', 'B', 'A', '8')
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#define V4L2_PIX_FMT_SGBRG10DPCM8 v4l2_fourcc('b', 'G', 'A', '8')
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#define V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0')
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#define V4L2_PIX_FMT_SRGGB10DPCM8 v4l2_fourcc('b', 'R', 'A', '8')
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#define V4L2_PIX_FMT_SBGGR12 v4l2_fourcc('B', 'G', '1', '2') /* 12 BGBG.. GRGR.. */
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#define V4L2_PIX_FMT_SGBRG12 v4l2_fourcc('G', 'B', '1', '2') /* 12 GBGB.. RGRG.. */
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#define V4L2_PIX_FMT_SGRBG12 v4l2_fourcc('B', 'A', '1', '2') /* 12 GRGR.. BGBG.. */
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#define V4L2_PIX_FMT_SRGGB12 v4l2_fourcc('R', 'G', '1', '2') /* 12 RGRG.. GBGB.. */
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#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */
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#endif
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