690 lines
18 KiB
Plaintext
690 lines
18 KiB
Plaintext
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/{
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clocks {
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compatible = "allwinner,clk-init";
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device_type = "clocks";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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reg = <0x0 0x02001000 0x0 0x1000>, /*cpux space */
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<0x0 0x07010000 0x0 0x1400>, /*cpus space */
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<0x0 0x07090000 0x0 0x400>; /*rtc space */
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/* register fixed rate clock*/
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clk_losc: losc {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "losc";
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};
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clk_iosc: iosc {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <16000000>;
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clock-output-names = "iosc";
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};
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clk_hosc: hosc {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "hosc";
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};
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clk_hoscdiv32k: hoscdiv32k {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "hoscdiv32k";
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};
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clk_osc48m: osc48m {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <48000000>;
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clock-output-names = "osc48m";
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};
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clk_pll_periph0div25m:pll_periph0div25m {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <25000000>;
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clock-output-names = "pll_periph0div25m";
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};
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/* register allwinner,pll-clock */
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clk_pll_cpu: pll_cpu {
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#clock-cells = <0>;
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compatible = "allwinner,cpus-pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_cpu";
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};
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clk_pll_periph0: pll_periph0 {
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#clock-cells = <0>;
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compatible = "allwinner,cpus-pll-clock";
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assigned-clocks = <&clk_pll_periph0>;
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assigned-clock-rates = <600000000>;
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lock-mode = "new";
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clock-output-names = "pll_periph0";
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};
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clk_pll_audio0: pll_audio0 {
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#clock-cells = <0>;
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compatible = "allwinner,cpus-pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_audio0";
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};
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clk_pll_audio0_div2: pll_audio0_div2 {
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#clock-cells = <0>;
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compatible = "allwinner,cpus-pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_audio0_div2";
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};
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clk_pll_audio0_div5: pll_audio0_div5 {
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#clock-cells = <0>;
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compatible = "allwinner,cpus-pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_audio0_div5";
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};
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clk_pll_audio1: pll_audio1 {
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#clock-cells = <0>;
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compatible = "allwinner,cpus-pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_audio1";
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};
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/* register fixed factor clock*/
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clk_pll_periph0x2: pll_periph0x2 {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph0>;
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clock-mult = <2>;
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clock-div = <1>;
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clock-output-names = "pll_periph0x2";
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};
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clk_pll_periph0x4: pll_periph0x4 {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph0>;
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clock-mult = <4>;
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clock-div = <1>;
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clock-output-names = "pll_periph0x4";
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};
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clk_pll_periph0800m: pll_periph0800m {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph0x4>;
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clock-mult = <1>;
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clock-div = <3>;
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clock-output-names = "pll_periph0800m";
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};
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clk_periph32k: periph32k {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph0x2>;
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clock-mult = <1>;
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clock-div = <36621>;
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clock-output-names = "periph32k";
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};
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clk_pll_audio1x4: pll_audio1x4 {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_audio1>;
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clock-mult = <4>;
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clock-div = <1>;
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clock-output-names = "pll_audio1x4";
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};
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clk_pll_audio1x2: pll_audio1x2 {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_audio1>;
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clock-mult = <2>;
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clock-div = <1>;
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clock-output-names = "pll_audio1x2";
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};
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clk_hoscd2: hoscd2 {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_hosc>;
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clock-mult = <1>;
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clock-div = <2>;
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clock-output-names = "hoscd2";
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};
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clk_osc48md4: osc48md4 {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_osc48m>;
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clock-mult = <1>;
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clock-div = <4>;
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clock-output-names = "osc48md4";
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};
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/* register allwinner,periph-clock */
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clk_cpu: cpu {
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#clock-cells = <0>;
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compatible = "allwinner,cpu-clock";
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clock-output-names = "cpu";
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};
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clk_axi: axi {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "axi";
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};
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clk_cpuapb: cpuapb {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "cpuapb";
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};
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clk_psi: psi {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "psi";
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};
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clk_ahb1: ahb1 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ahb1";
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};
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clk_ahb2: ahb2 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ahb2";
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};
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clk_apb1: apb1 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "apb1";
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};
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clk_apb2: apb2 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "apb2";
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};
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clk_mbus: mbus {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "mbus";
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};
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clk_ce: ce {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ce";
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};
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clk_aipu: aipu {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "aipu";
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};
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clk_aipu_slv: aipu_slv {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "aipu_slv";
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};
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clk_dma: dma {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "dma";
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};
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clk_msgbox0: msgbox0 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "msgbox0";
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};
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clk_msgbox1: msgbox1 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "msgbox1";
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};
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clk_hwspinlockt: hwspinlock {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "hwspinlock";
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};
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clk_hstimer: hstimer {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "hstimer";
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};
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clk_avs: avs {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "avs";
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};
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clk_dbgsys: dbgsys {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "dbgsys";
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};
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clk_pwm: pwm {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "pwm";
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};
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clk_sdram: sdram {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdram";
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};
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clk_nand0: nand0 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "nand0";
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};
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clk_nand1: nand1 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "nand1";
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};
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clk_sdmmc0_mod: sdmmc0_mod {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc0_mod";
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};
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clk_sdmmc0_bus: sdmmc0_bus {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc0_bus";
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};
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clk_sdmmc0_rst: sdmmc0_rst {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc0_rst";
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};
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clk_sdmmc1_mod: sdmmc1_mod {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc1_mod";
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};
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clk_sdmmc1_bus: sdmmc1_bus {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc1_bus";
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};
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clk_sdmmc1_rst: sdmmc1_rst {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc1_rst";
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};
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clk_uart0: uart0 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "uart0";
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};
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clk_uart1: uart1 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "uart1";
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};
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clk_uart2: uart2 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "uart2";
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};
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clk_uart3: uart3 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "uart3";
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};
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clk_twi0: twi0 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "twi0";
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};
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clk_twi1: twi1 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "twi1";
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};
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clk_scr0: scr0 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "scr0";
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};
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clk_spi0: spi0 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "spi0";
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};
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clk_spi1: spi1 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "spi1";
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};
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clk_gmac0_25m: gmac0_25m {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "gmac0_25m";
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};
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clk_gmac0: gmac0 {
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#clock-cells = <0>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "gmac0";
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};
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|
|
clk_irrx: irrx {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "irrx";
|
||
|
|
};
|
||
|
|
clk_irtx: irtx {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "irtx";
|
||
|
|
};
|
||
|
|
clk_i2s0: i2s0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "i2s0";
|
||
|
|
};
|
||
|
|
clk_i2s1: i2s1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "i2s1";
|
||
|
|
};
|
||
|
|
clk_i2s2: i2s2 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "i2s2";
|
||
|
|
};
|
||
|
|
clk_spdif: spdif {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "spdif";
|
||
|
|
};
|
||
|
|
clk_spdifrx: spdifrx {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "spdifrx";
|
||
|
|
};
|
||
|
|
clk_usbphy0: usbphy0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbphy0";
|
||
|
|
};
|
||
|
|
clk_usbphy1: usbphy1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbphy1";
|
||
|
|
};
|
||
|
|
clk_usbohci0: usbohci0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbohci0";
|
||
|
|
};
|
||
|
|
clk_usbohci0_12m: usbohci0_12m {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbohci0_12m";
|
||
|
|
};
|
||
|
|
clk_usbohci1: usbohci1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbohci1";
|
||
|
|
};
|
||
|
|
clk_usbohci1_12m: usbohci1_12m {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbohci1_12m";
|
||
|
|
};
|
||
|
|
clk_usbehci0: usbehci0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbehci0";
|
||
|
|
};
|
||
|
|
clk_usbehci1: usbehci1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbehci1";
|
||
|
|
};
|
||
|
|
clk_usbotg0: usbotg0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbotg0";
|
||
|
|
};
|
||
|
|
clk_usbotg1: usbotg1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "usbotg1";
|
||
|
|
};
|
||
|
|
clk_pio: pio {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "pio";
|
||
|
|
};
|
||
|
|
clk_ledc: ledc {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "ledc";
|
||
|
|
};
|
||
|
|
|
||
|
|
/*cpus space clocks from PRCM-SPEC*/
|
||
|
|
clk_cpurahbs: cpurahbs {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "cpurahbs";
|
||
|
|
};
|
||
|
|
clk_cpurapbs0: cpurapbs0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
assigned-clocks = <&clk_cpurapbs0>;
|
||
|
|
assigned-clock-rates = <100000000>;
|
||
|
|
clock-output-names = "cpurapbs0";
|
||
|
|
};
|
||
|
|
clk_cpurapbs1: cpurapbs1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "cpurapbs1";
|
||
|
|
};
|
||
|
|
clk_pll_lock_dg: pll_lock_dg {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "pll_lock_dg";
|
||
|
|
};
|
||
|
|
clk_pll_dg: pll_dg {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "pll_dg";
|
||
|
|
};
|
||
|
|
clk_mad: mad {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "mad";
|
||
|
|
};
|
||
|
|
clk_mad_cfg: mad_cfg {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "mad_cfg";
|
||
|
|
};
|
||
|
|
clk_lpsd: lpsd {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "lpsd";
|
||
|
|
};
|
||
|
|
clk_mad_sram: mad_sram {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "mad_sram";
|
||
|
|
};
|
||
|
|
clk_gpadc: gpadc {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "gpadc";
|
||
|
|
};
|
||
|
|
clk_gpadc1: gpadc1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "gpadc1";
|
||
|
|
};
|
||
|
|
clk_ths: ths {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "ths";
|
||
|
|
};
|
||
|
|
clk_r_dma: r_dma {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_dma";
|
||
|
|
};
|
||
|
|
clk_timer: timer {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "timer";
|
||
|
|
};
|
||
|
|
clk_watchdog: watchdog {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "watchdog";
|
||
|
|
};
|
||
|
|
clk_r_pwm: r_pwm {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_pwm";
|
||
|
|
};
|
||
|
|
clk_codec_adc: codec_adc {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "codec_adc";
|
||
|
|
};
|
||
|
|
clk_codec_dac: codec_dac {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "codec_dac";
|
||
|
|
};
|
||
|
|
clk_dmic: dmic {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "dmic";
|
||
|
|
};
|
||
|
|
clk_lradc: lradc {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "lradc";
|
||
|
|
};
|
||
|
|
clk_r_i2s0: r_i2s0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_i2s0";
|
||
|
|
};
|
||
|
|
clk_r_i2s0_asrc: r_i2s0_asrc {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_i2s0_asrc";
|
||
|
|
};
|
||
|
|
clk_r_i2s1: r_i2s1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_i2s1";
|
||
|
|
};
|
||
|
|
clk_r_uart: r_uart {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_uart";
|
||
|
|
};
|
||
|
|
|
||
|
|
clk_r_twi0: r_twi0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_twi0";
|
||
|
|
};
|
||
|
|
|
||
|
|
clk_r_ppu: r_ppu {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_ppu";
|
||
|
|
};
|
||
|
|
clk_dsp0: dsp0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "dsp0";
|
||
|
|
};
|
||
|
|
clk_dsp0_cfg: dsp0_cfg {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "dsp0_cfg";
|
||
|
|
};
|
||
|
|
clk_dsp1: dsp1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "dsp1";
|
||
|
|
};
|
||
|
|
clk_dsp1_cfg: dsp1_cfg {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "dsp1_cfg";
|
||
|
|
};
|
||
|
|
clk_dsp0_dbg: dsp0_dbg {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "dsp0_dbg";
|
||
|
|
};
|
||
|
|
clk_cpurcir: cpurcir {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "cpurcir";
|
||
|
|
};
|
||
|
|
clk_r_msgbox: r_msgbox {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_msgbox";
|
||
|
|
};
|
||
|
|
clk_r_hwspinlock: r_hwspinlock {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_hwspinlock";
|
||
|
|
};
|
||
|
|
clk_r_dsp_sram: r_dsp_sram {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_dsp_sram";
|
||
|
|
};
|
||
|
|
clk_r_dsp_cache0: r_dsp_cache0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_dsp_cache0";
|
||
|
|
};
|
||
|
|
clk_r_dsp_cache1: r_dsp_cache1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "r_dsp_cache1";
|
||
|
|
};
|
||
|
|
clk_rtc: rtc {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "rtc";
|
||
|
|
};
|
||
|
|
clk_psram: psram {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "psram";
|
||
|
|
};
|
||
|
|
clk_cpucfg: cpucfg {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "cpucfg";
|
||
|
|
};
|
||
|
|
clk_cpurpio: cpurpio {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-cpus-clock";
|
||
|
|
clock-output-names = "cpurpio";
|
||
|
|
};
|
||
|
|
/*rtc clk*/
|
||
|
|
clk_losc_out: losc_out {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-rtc-clock";
|
||
|
|
clock-output-names = "losc_out";
|
||
|
|
};
|
||
|
|
clk_hosc32k: hosc32k {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-rtc-clock";
|
||
|
|
clock-output-names = "hosc32k";
|
||
|
|
};
|
||
|
|
clk_rtc_spi: rtc_spi {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-rtc-clock";
|
||
|
|
clock-output-names = "rtc_spi";
|
||
|
|
};
|
||
|
|
clk_dcxo_out: dcxo_out {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-rtc-clock";
|
||
|
|
clock-output-names = "dcxo_out";
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|