263 lines
6.7 KiB
C
263 lines
6.7 KiB
C
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/*
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* Device Tree support for Allwinner A1X SoCs
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*
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* Copyright (C) 2012 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/memblock.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mcpm.h>
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#include "sunxi.h"
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#include <linux/ion_sunxi.h>
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void __iomem *sunxi_cpucfg_base;
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void __iomem *sunxi_cpuscfg_base;
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void __iomem *sunxi_sysctl_base;
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void __iomem *sunxi_rtc_base;
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void __iomem *sunxi_soft_entry_base;
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static void __init sunxi_dt_cpufreq_init(void)
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{
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platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
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}
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static const char * const sunxi_board_dt_compat[] = {
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"allwinner,sun4i-a10",
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"allwinner,sun5i-a10s",
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"allwinner,sun5i-a13",
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"allwinner,sun5i-r8",
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NULL,
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};
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DT_MACHINE_START(SUNXI_DT, "Allwinner sun4i/sun5i Families")
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.dt_compat = sunxi_board_dt_compat,
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.init_late = sunxi_dt_cpufreq_init,
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MACHINE_END
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static const char * const sun6i_board_dt_compat[] = {
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"allwinner,sun6i-a31",
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"allwinner,sun6i-a31s",
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NULL,
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};
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extern void __init sun6i_reset_init(void);
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static void __init sun6i_timer_init(void)
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{
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of_clk_init(NULL);
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if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
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sun6i_reset_init();
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clocksource_probe();
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}
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DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
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.init_time = sun6i_timer_init,
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.dt_compat = sun6i_board_dt_compat,
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.init_late = sunxi_dt_cpufreq_init,
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MACHINE_END
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static const char * const sun7i_board_dt_compat[] = {
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"allwinner,sun7i-a20",
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NULL,
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};
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DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
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.dt_compat = sun7i_board_dt_compat,
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.init_late = sunxi_dt_cpufreq_init,
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MACHINE_END
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#define IO_ADDRESS(x) ((x) + 0xf0000000)
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static struct map_desc sunxi_io_desc[] __initdata = {
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#ifdef CONFIG_ARCH_SUN8IW8P1
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{
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.virtual = (unsigned long) IO_ADDRESS(SUNXI_IO_PBASE),
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.pfn = __phys_to_pfn(SUNXI_IO_PBASE),
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.length = SUNXI_IO_SIZE,
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.type = MT_DEVICE,
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},
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#else
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{
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.virtual = (unsigned long) UARTIO_ADDRESS(SUNXI_UART_PBASE),
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.pfn = __phys_to_pfn(SUNXI_UART_PBASE),
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.length = SUNXI_UART_SIZE,
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.type = MT_DEVICE,
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},
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#endif
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#ifdef CONFIG_ARCH_SUN8IW8P1
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{
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.virtual = (unsigned long)IO_ADDRESS(SUNXI_SRAM_A1_PBASE),
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.pfn = __phys_to_pfn(SUNXI_SRAM_A1_PBASE),
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.length = SUNXI_SRAM_A1_SIZE,
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.type = MT_MEMORY_RWX_ITCM,
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},
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{
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.virtual = (unsigned long)IO_ADDRESS(SUNXI_SRAM_C_PBASE),
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.pfn = __phys_to_pfn(SUNXI_SRAM_C_PBASE),
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.length = SUNXI_SRAM_C_SIZE,
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.type = MT_MEMORY_RWX_ITCM,
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},
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#endif
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#if defined(CONFIG_ARCH_SUN8IW10P1)
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{
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.virtual = (unsigned long)IO_ADDRESS(SUNXI_SRAM_A1_PBASE),
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.pfn = __phys_to_pfn(SUNXI_SRAM_A1_PBASE),
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.length = SUNXI_SRAM_A1_SIZE,
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.type = MT_MEMORY_RWX_ITCM,
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},
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{
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.virtual = (unsigned long)IO_ADDRESS(SUNXI_SRAM_C_PBASE),
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.pfn = __phys_to_pfn(SUNXI_SRAM_C_PBASE),
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.length = SUNXI_SRAM_C_SIZE,
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.type = MT_MEMORY_RWX_ITCM,
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},
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#endif
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#if defined(CONFIG_ARCH_SUN8IW6P1)
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{
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.virtual = (unsigned long)IO_ADDRESS(SUNXI_SRAM_A1_PBASE),
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.pfn = __phys_to_pfn(SUNXI_SRAM_A1_PBASE),
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.length = SUNXI_SRAM_A1_SIZE,
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.type = MT_MEMORY_RWX_ITCM,
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},
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{
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.virtual = (unsigned long)IO_ADDRESS(SUNXI_SRAM_A2_PBASE),
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.pfn = __phys_to_pfn(SUNXI_SRAM_A2_PBASE),
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.length = SUNXI_SRAM_A2_SIZE,
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.type = MT_DEVICE_NONSHARED,
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},
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#endif
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};
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void __init sunxi_map_io(void)
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{
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iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));
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}
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static struct platform_device sunxi_cpuidle = {
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.name = "sunxi_cpuidle",
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};
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static void __init sunxi_init_late(void)
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{
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if (of_machine_is_compatible("allwinner,sun8iw11p1") ||
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of_machine_is_compatible("allwinner,sun8iw12p1") ||
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of_machine_is_compatible("allwinner,sun8iw15p1") ||
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of_machine_is_compatible("allwinner,sun8iw16p1") ||
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of_machine_is_compatible("allwinner,sun8iw17p1") ||
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of_machine_is_compatible("allwinner,sun8iw18p1") ||
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of_machine_is_compatible("allwinner,sun8iw19p1") ||
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of_machine_is_compatible("allwinner,sun8iw21p1") ||
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of_machine_is_compatible("allwinner,sun8iw8p1") ||
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of_machine_is_compatible("allwinner,sun8iw7p1") ||
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of_machine_is_compatible("allwinner,sun8iw6p1"))
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platform_device_register(&sunxi_cpuidle);
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}
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static const char * const sun8i_board_dt_compat[] = {
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"allwinner,sun8i-a23",
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"allwinner,sun8i-a33",
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"allwinner,sun8i-h3",
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"allwinner,sun8iw11p1",
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"allwinner,sun8iw12p1",
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"allwinner,sun8iw15p1",
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"allwinner,sun8iw16p1",
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"allwinner,sun8iw17p1",
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"allwinner,sun8iw18p1",
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"allwinner,sun8iw19p1",
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"allwinner,sun8iw21p1",
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"allwinner,sun8iw8p1",
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"allwinner,sun8iw7p1",
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"allwinner,sun8iw6p1",
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NULL,
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};
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#define PHYS_MEM_START 0x40000000
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struct ion_mem_reserve_info ion_reserve_mem = {
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.size = 0,
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.start = 0,
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};
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static int __init ion_mem_reserve(char *p)
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{
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char *endp;
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char *startp = p;
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char *endedp = p + strlen(p) - 1;
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struct memblock_region *reg;
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u32 mem_size = 0, reserve_size = 0;
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u32 total_pages = 0, phys_mem_size = 0;
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for_each_memblock(memory, reg) {
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total_pages += memblock_region_memory_end_pfn(reg) -
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memblock_region_memory_base_pfn(reg);
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}
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phys_mem_size = total_pages << PAGE_SHIFT;
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do {
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reserve_size = (u32)memparse(startp, &endp);
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if (*endp == '@') {
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startp = endp + 1;
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mem_size = (u32)memparse(startp, &endp);
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} else {
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/*reserve_size@dram_size*/
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pr_err("%s: err format for ion reserve list!\n", __func__);
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return 0;
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}
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startp = endp + 1;
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if (mem_size == phys_mem_size)
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break;
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} while (startp < endedp);
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if (mem_size == phys_mem_size) {
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ion_reserve_mem.size = reserve_size;
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ion_reserve_mem.start = PHYS_MEM_START + phys_mem_size - ion_reserve_mem.size;
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memblock_reserve(ion_reserve_mem.start, ion_reserve_mem.size);
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pr_info("%s: reserve %dMiB at 0x%x\n",
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__func__, ion_reserve_mem.size >> 20, ion_reserve_mem.start);
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} else
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pr_err("%s: ion reserve list doesn't match current mem size!\n",
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__func__);
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return 0;
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}
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static int __init early_ion_carveout_list(char *p)
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{
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return ion_mem_reserve(p);
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}
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early_param("ion_carveout_list", early_ion_carveout_list);
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DT_MACHINE_START(SUN8I_DT, CONFIG_SUNXI_SOC_NAME)
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.init_time = sun6i_timer_init,
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.map_io = sunxi_map_io,
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#if defined (CONFIG_ARCH_SUN8IW6P1)
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.smp_init = smp_init_ops(mcpm_smp_set_ops),
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#endif
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.init_early = NULL,
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.init_late = sunxi_init_late,
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.dt_compat = sun8i_board_dt_compat,
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MACHINE_END
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static const char * const sun9i_board_dt_compat[] = {
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"allwinner,sun9i-a80",
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NULL,
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};
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DT_MACHINE_START(SUN9I_DT, "Allwinner sun9i Family")
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.dt_compat = sun9i_board_dt_compat,
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MACHINE_END
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