342 lines
10 KiB
C
342 lines
10 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/* Copyright (c) 2018-2021 Arm Technology (China) Co., Ltd. All rights reserved. */
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#ifndef __UAPI_MISC_ARMCHINA_AIPU_H__
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#define __UAPI_MISC_ARMCHINA_AIPU_H__
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#include <linux/types.h>
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#include <linux/ioctl.h>
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/*
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* In the following member descriptions,
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* [must] mean that the fields must be filled by user mode driver any way.
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* [alloc] mean that the buffer(s) represented by the fields must be allocated
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* by user mode driver before calling IOCTL.
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* [kmd] mean that the fields should be filled by kernel mode driver
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* if the calls are successfull.
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*/
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/**
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* emum aipu_arch - AIPU architecture number
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* @AIPU_ARCH_ZHOUYI: AIPU architecture is Zhouyi.
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*
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* This enum is used to indicate the architecture of an AIPU core in the system.
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*/
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enum aipu_arch {
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AIPU_ARCH_ZHOUYI = 0,
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};
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/**
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* emum aipu_isa_version - AIPU ISA version number
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* @AIPU_ISA_VERSION_ZHOUYI_V1: AIPU ISA version is Zhouyi v1.
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* @AIPU_ISA_VERSION_ZHOUYI_V2: AIPU ISA version is Zhouyi v2.
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*
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* Zhouyi architecture has multiple ISA versions released.
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* This enum is used to indicate the ISA version of an AIPU core in the system.
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*/
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enum aipu_isa_version {
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AIPU_ISA_VERSION_ZHOUYI_V1 = 1,
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AIPU_ISA_VERSION_ZHOUYI_V2 = 2,
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};
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/**
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* struct aipu_core_cap - Capability of an AIPU core
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* @core_id: [kmd] Core ID
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* @arch: [kmd] Architecture number
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* @version: [kmd] ISA version number
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* @config: [kmd] Configuration number
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* @info: [kmd] Debugging information
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*
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* For example, Z2-1104:
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* arch == AIPU_ARCH_ZHOUYI (0)
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* version == AIPU_ISA_VERSION_ZHOUYI_V2 (2)
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* config == 1104
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*/
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struct aipu_core_cap {
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__u32 core_id;
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__u32 arch;
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__u32 version;
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__u32 config;
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struct aipu_debugger_info {
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__u64 reg_base; /* External register base address (physical) */
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} info;
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};
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/**
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* struct aipu_cap - Common capability of the AIPU core(s)
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* @core_cnt: [kmd] Count of AIPU core(s) in the system
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* @host_to_aipu_offset: [kmd] Address space offset between host and AIPU
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* @is_homogeneous: [kmd] IS homogeneous AIPU system or not (1/0)
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* @core_cap: [kmd] Capability of the single AIPU core
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*
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* AIPU driver supports the management of multiple AIPU cores in the system.
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* This struct is used to indicate the common capability of all AIPU core(s).
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* User mode driver should get this capability via AIPU_IOCTL_QUERYCAP command.
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* If the core count is 1, the per-core capability is in the core_cap member;
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* otherwise user mode driver should get all the per-core capabilities as the
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* core_cnt indicates via AIPU_IOCTL_QUERYCORECAP command.
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*/
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struct aipu_cap {
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__u32 core_cnt;
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__u64 host_to_aipu_offset;
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__u32 is_homogeneous;
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struct aipu_core_cap core_cap;
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};
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/**
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* enum aipu_mm_data_type - Data/Buffer type
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* @AIPU_MM_DATA_TYPE_NONE: No type
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* @AIPU_MM_DATA_TYPE_TEXT: Text (instructions)
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* @AIPU_MM_DATA_TYPE_RODATA: Read-only data (parameters)
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* @AIPU_MM_DATA_TYPE_STACK: Stack
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* @AIPU_MM_DATA_TYPE_STATIC: Static data (weights)
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* @AIPU_MM_DATA_TYPE_REUSE: Reuse data (feature maps)
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*/
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enum aipu_mm_data_type {
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AIPU_MM_DATA_TYPE_NONE,
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AIPU_MM_DATA_TYPE_TEXT,
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AIPU_MM_DATA_TYPE_RODATA,
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AIPU_MM_DATA_TYPE_STACK,
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AIPU_MM_DATA_TYPE_STATIC,
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AIPU_MM_DATA_TYPE_REUSE,
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};
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/**
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* struct aipu_buf_desc - Buffer description.
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* @pa: [kmd] Buffer physical base address
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* @dev_offset: [kmd] Device offset used in mmap
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* @bytes: [kmd] Buffer size in bytes
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*/
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struct aipu_buf_desc {
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__u64 pa;
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__u64 dev_offset;
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__u64 bytes;
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};
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/**
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* struct aipu_buf_request - Buffer allocation request structure.
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* @bytes: [must] Buffer size to allocate (in bytes)
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* @align_in_page: [must] Buffer address alignment (in page, i.e. 4KB)
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* @data_type: [must] Type of data in this buffer/Type of this buffer
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* @desc: [kmd] Descriptor of the successfully allocated buffer
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*/
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struct aipu_buf_request {
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__u64 bytes;
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__u32 align_in_page;
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__u32 data_type;
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struct aipu_buf_desc desc;
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};
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/**
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* enum aipu_job_execution_flag - Flags for AIPU's executions
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* @AIPU_JOB_EXEC_FLAG_NONE: No flag
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* @AIPU_JOB_EXEC_FLAG_SRAM_MUTEX: The job uses SoC SRAM exclusively.
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*/
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enum aipu_job_execution_flag {
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AIPU_JOB_EXEC_FLAG_NONE = 0x0,
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AIPU_JOB_EXEC_FLAG_SRAM_MUTEX = 0x1,
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};
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/**
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* struct aipu_job_desc - Description of a job to be scheduled.
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* @is_defer_run: Reserve an AIPU core for this job and defer the running of it
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* @version_compatible:Is this job compatible on AIPUs with different ISA version
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* @core_id: ID of the core requested to reserve for the deferred job
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* @do_trigger: Trigger the previously scheduled deferred job to run
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* @aipu_arch: [must] Target device architecture
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* @aipu_version: [must] Target device ISA version
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* @aipu_config: [must] Target device configuration
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* @start_pc_addr: [must] Address of the start PC
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* @intr_handler_addr: [must] Address of the AIPU interrupt handler
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* @data_0_addr: [must] Address of the 0th data buffer
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* @data_1_addr: [must] Address of the 1th data buffer
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* @job_id: [must] ID of this job
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* @enable_prof: Enable performance profiling counters in SoC (if any)
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* @enable_asid: Enable ASID feature
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* @enable_poll_opt: Enable optimizations for job status polling
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* @exec_flag: Combinations of execution flags
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*
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* For fields is_defer_run/do_trigger/enable_prof/enable_asid/enable_poll_opt,
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* set them to be 1/0 to enable/disable the corresponding operations.
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*/
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struct aipu_job_desc {
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__u32 is_defer_run;
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__u32 version_compatible;
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__u32 core_id;
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__u32 do_trigger;
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__u32 aipu_arch;
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__u32 aipu_version;
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__u32 aipu_config;
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__u64 start_pc_addr;
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__u64 intr_handler_addr;
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__u64 data_0_addr;
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__u64 data_1_addr;
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__u32 job_id;
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__u32 enable_prof;
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__u32 enable_asid;
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__u32 enable_poll_opt;
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__u32 exec_flag;
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};
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/**
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* struct aipu_job_status_desc - Jod execution status.
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* @job_id: [kmd] Job ID
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* @thread_id: [kmd] ID of the thread scheduled this job
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* @state: [kmd] Execution state: done or exception
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* @pdata: [kmd] External profiling results
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*/
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struct aipu_job_status_desc {
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__u32 job_id;
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__u32 thread_id;
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#define AIPU_JOB_STATE_DONE 0x1
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#define AIPU_JOB_STATE_EXCEPTION 0x2
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__u32 state;
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struct aipu_ext_profiling_data {
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__s64 execution_time_ns; /* [kmd] Execution time */
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__u32 rdata_tot_msb; /* [kmd] Total read transactions (MSB) */
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__u32 rdata_tot_lsb; /* [kmd] Total read transactions (LSB) */
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__u32 wdata_tot_msb; /* [kmd] Total write transactions (MSB) */
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__u32 wdata_tot_lsb; /* [kmd] Total write transactions (LSB) */
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__u32 tot_cycle_msb; /* [kmd] Total cycle counts (MSB) */
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__u32 tot_cycle_lsb; /* [kmd] Total cycle counts (LSB) */
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} pdata;
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};
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/**
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* struct aipu_job_status_query - Query status of (a) job(s) scheduled before.
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* @max_cnt: [must] Maximum number of job status to query
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* @of_this_thread: [must] Get status of jobs scheduled by this thread/all threads share fd (1/0)
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* @status: [alloc] Pointer to an array (length is max_cnt) to store the status
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* @poll_cnt: [kmd] Count of the successfully polled job(s)
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*/
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struct aipu_job_status_query {
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__u32 max_cnt;
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__u32 of_this_thread;
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struct aipu_job_status_desc *status;
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__u32 poll_cnt;
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};
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struct aipu_job_status_query_32 {
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__u32 max_cnt;
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__u32 of_this_thread;
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compat_caddr_t status;
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__u32 poll_cnt;
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};
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/**
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* struct aipu_io_req - AIPU core IO operations request.
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* @core_id: [must] Core ID
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* @offset: [must] Register offset
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* @rw: [must] Read or write operation
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* @value: [must]/[kmd] Value to be written/value readback
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*/
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struct aipu_io_req {
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__u32 core_id;
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__u32 offset;
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enum aipu_rw_attr {
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AIPU_IO_READ,
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AIPU_IO_WRITE
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} rw;
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__u32 value;
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};
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/*
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* AIPU IOCTL List
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*/
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#define AIPU_IOCTL_MAGIC 'A'
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/**
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* DOC: AIPU_IOCTL_QUERY_CAP
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*
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* @Description
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*
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* ioctl to query the common capability of AIPUs
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*
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* User mode driver should call this before calling AIPU_IOCTL_QUERYCORECAP.
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*/
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#define AIPU_IOCTL_QUERY_CAP _IOR(AIPU_IOCTL_MAGIC, 0, struct aipu_cap)
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/**
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* DOC: AIPU_IOCTL_QUERY_CORE_CAP
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*
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* @Description
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*
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* ioctl to query the capability of an AIPU core
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*
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* User mode driver only need to call this when the core count returned by AIPU_IOCTL_QUERYCAP > 1.
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*/
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#define AIPU_IOCTL_QUERY_CORE_CAP _IOR(AIPU_IOCTL_MAGIC, 1, struct aipu_core_cap)
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/**
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* DOC: AIPU_IOCTL_REQ_BUF
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*
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* @Description
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*
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* ioctl to request to allocate a coherent buffer
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*
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* This fails if kernel driver cannot find a free buffer meets the size/alignment request.
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*/
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#define AIPU_IOCTL_REQ_BUF _IOWR(AIPU_IOCTL_MAGIC, 2, struct aipu_buf_request)
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/**
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* DOC: AIPU_IOCTL_FREE_BUF
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*
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* @Description
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*
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* ioctl to request to free a coherent buffer allocated by AIPU_IOCTL_REQBUF
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*
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*/
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#define AIPU_IOCTL_FREE_BUF _IOW(AIPU_IOCTL_MAGIC, 3, struct aipu_buf_desc)
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/**
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* DOC: AIPU_IOCTL_DISABLE_SRAM
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*
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* @Description
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*
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* ioctl to disable the management of SoC SRAM in kernel driver
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*
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* This fails if the there is no SRAM in the system or the SRAM has already been allocated.
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*/
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#define AIPU_IOCTL_DISABLE_SRAM _IO(AIPU_IOCTL_MAGIC, 4)
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/**
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* DOC: AIPU_IOCTL_ENABLE_SRAM
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*
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* @Description
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*
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* ioctl to enable the management of SoC SRAM in kernel driver disabled by AIPU_IOCTL_DISABLE_SRAM
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*/
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#define AIPU_IOCTL_ENABLE_SRAM _IO(AIPU_IOCTL_MAGIC, 5)
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/**
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* DOC: AIPU_IOCTL_SCHEDULE_JOB
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*
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* @Description
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*
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* ioctl to schedule a user job to kernel mode driver for execution
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*
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* This is a non-blocking operation therefore user mode driver should check the job status
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* via AIPU_IOCTL_QUERY_STATUS.
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*/
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#define AIPU_IOCTL_SCHEDULE_JOB _IOW(AIPU_IOCTL_MAGIC, 6, struct aipu_job_desc)
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/**
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* DOC: AIPU_IOCTL_QUERY_STATUS
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*
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* @Description
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*
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* ioctl to query the execution status of one or multiple scheduled job(s)
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*/
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#define AIPU_IOCTL_QUERY_STATUS _IOWR(AIPU_IOCTL_MAGIC, 7, struct aipu_job_status_query)
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#define AIPU_IOCTL_QUERY_STATUS_32 _IOWR(AIPU_IOCTL_MAGIC, 7, struct aipu_job_status_query_32)
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/**
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* DOC: AIPU_IOCTL_KILL_TIMEOUT_JOB
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*
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* @Description
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*
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* ioctl to kill a timeout job and clean it from kernel mode driver.
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*/
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#define AIPU_IOCTL_KILL_TIMEOUT_JOB _IOW(AIPU_IOCTL_MAGIC, 8, __u32)
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/**
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* DOC: AIPU_IOCTL_REQ_IO
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*
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* @Description
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*
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* ioctl to read/write an external register of an AIPU core.
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*/
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#define AIPU_IOCTL_REQ_IO _IOWR(AIPU_IOCTL_MAGIC, 9, struct aipu_io_req)
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#endif /* __UAPI_MISC_ARMCHINA_AIPU_H__ */
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