430 lines
12 KiB
C
430 lines
12 KiB
C
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/*
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* sunxi_dspo/dspo_driver.c
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*
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* Copyright (c) 2007-2021 Allwinnertech Co., Ltd.
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* Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "dspo_driver.h"
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#include "dspo_reg.h"
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struct dspo_resource_t dspo_res;
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int dspo_open(struct inode *inode, struct file *file)
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{
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atomic_inc(&dspo_res.user_cnt);
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return 0;
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}
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int dspo_release(struct inode *inode, struct file *file)
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{
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atomic_dec(&dspo_res.user_cnt);
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return 0;
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}
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long dspo_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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s32 ret = 0;
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unsigned long karg[2];
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unsigned long ubuffer[2] = { 0 };
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if (!mutex_trylock(&dspo_res.mutex))
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mutex_lock(&dspo_res.mutex);
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if (copy_from_user((void *)karg, (void __user *)arg,
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sizeof(unsigned long) * 2)) {
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pr_err("copy_from_user fail!\n");
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ret = -EFAULT;
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goto OUT;
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}
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ubuffer[0] = *(unsigned long *)karg;
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ubuffer[1] = (*(unsigned long *)(karg + 1));
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switch (cmd) {
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case DSPO_CMD_DEVICE_SWITCH:
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{
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struct dspo_config_t *p_cfg = NULL;
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if (!ubuffer[0]) {
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if (dspo_res.p_dspo->is_enable(dspo_res.p_dspo))
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ret = dspo_res.p_dspo->disable(dspo_res.p_dspo);
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} else {
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p_cfg = kmalloc(sizeof(struct dspo_config_t), __GFP_ZERO | GFP_KERNEL);
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if (copy_from_user(p_cfg, (void __user *)ubuffer[1],
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sizeof(struct dspo_config_t))) {
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pr_err("copy_from_user fail 2!\n");
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ret = -EFAULT;
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goto OUT;
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}
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if (dspo_res.p_dspo->is_enable(dspo_res.p_dspo))
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ret = dspo_res.p_dspo->disable(dspo_res.p_dspo);
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ret = dspo_res.p_dspo->enable(dspo_res.p_dspo, p_cfg);
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kfree(p_cfg);
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}
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}
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break;
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case DSPO_CMD_COMMIT:
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{
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struct dspo_dma_info_t info;
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if (copy_from_user(&info, (void __user *)ubuffer[0],
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sizeof(struct dspo_dma_info_t))) {
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ret = -EFAULT;
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goto OUT;
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}
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if (dspo_res.p_dspo->is_enable(dspo_res.p_dspo))
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dspo_res.p_dspo->commit(dspo_res.p_dspo, &info);
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else
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pr_warn("DSPO is not enabled!\n");
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}
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break;
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default:
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ret = -EFAULT;
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goto OUT;
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}
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OUT:
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mutex_unlock(&dspo_res.mutex);
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return ret;
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}
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int dspo_mmap(struct file *file, struct vm_area_struct *vma)
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{
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unsigned long mypfn = vma->vm_pgoff;
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unsigned long vmsize = vma->vm_end - vma->vm_start;
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vma->vm_pgoff = 0;
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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if (remap_pfn_range(vma, vma->vm_start, mypfn,
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vmsize, vma->vm_page_prot))
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return -EAGAIN;
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return 0;
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}
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static const struct file_operations dspo_fops = {
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.owner = THIS_MODULE,
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.open = dspo_open,
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.release = dspo_release,
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.unlocked_ioctl = dspo_ioctl,
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.mmap = dspo_mmap,
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};
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static const struct of_device_id sunxi_dspo_match[] = {
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{.compatible = "allwinner,sunxi-dspo",},
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{},
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};
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static ssize_t dspo_info_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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ssize_t count = 0;
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if (dspo_res.p_dspo) {
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struct dspo_config_t *p_cfg = NULL;
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struct dspo_health_info_t info;
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p_cfg = dspo_res.p_dspo->get_config(dspo_res.p_dspo);
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dspo_res.p_dspo->get_health_info(dspo_res.p_dspo, &info);
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if (p_cfg) {
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count += sprintf(buf + count, "DSPO INFOMATION:\n");
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count += sprintf(buf + count, "Enable status:%u irq cnt:%llu err_cnt:%u fps:%u\n",
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dspo_res.p_dspo->is_enable(dspo_res.p_dspo),
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info.irq_cnt, info.err_cnt, info.realtime_fps);
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if (dspo_res.p_dspo->is_enable(dspo_res.p_dspo)) {
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count += sprintf(buf + count, " == Output setting: == \n");
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count += sprintf(
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buf + count, "Protocol:%s separate_sync:%u data "
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"sequence:%u bit_width:%u\n",
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(p_cfg->protocol == DSPO_BT656) ? "BT656" : "BT1120",
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p_cfg->separate_sync,
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p_cfg->data_seq_sel, p_cfg->bit_width);
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count += sprintf(buf + count, "Dclk setting:%u %u %u\n",
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p_cfg->dclk_set.dclk_en, p_cfg->dclk_set.dclk_invt,
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p_cfg->dclk_set.dclk_dly_num);
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count += sprintf(buf + count, " == Detail timing info: == \n");
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count += sprintf(buf + count, "Output mode:%u\n", p_cfg->output_mode);
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count += sprintf(
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buf + count, "Resolution:[%ux%u%s@%uHz]",
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p_cfg->timing_info.x_res,
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p_cfg->timing_info.y_res,
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(p_cfg->timing_info.b_interlace) ? "I"
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: "P",
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DIV_ROUND_CLOSEST(
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p_cfg->timing_info.pixel_clk *
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(p_cfg->timing_info.b_interlace +
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1),
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p_cfg->timing_info.hor_total_time *
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p_cfg->timing_info.ver_total_time));
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count += sprintf(buf + count, "hspw:%u, ht:%u hbp:%u hfp:%u hpol:%u\n",
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p_cfg->timing_info.hor_sync_time,
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p_cfg->timing_info.hor_total_time,
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p_cfg->timing_info.hor_back_porch,
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p_cfg->timing_info.hor_front_porch,
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p_cfg->timing_info.hor_sync_polarity);
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count += sprintf(buf + count, "vspw:%u, vt:%u vbp:%u vfp:%u vpol:%u\n",
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p_cfg->timing_info.ver_sync_time,
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p_cfg->timing_info.ver_total_time,
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p_cfg->timing_info.ver_back_porch,
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p_cfg->timing_info.ver_front_porch,
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p_cfg->timing_info.ver_sync_polarity);
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}
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count += sprintf(buf + count, " == Hardware resource: == \n");
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count += sprintf(buf + count, "reg base:0x%lx irq_no:%u\n",
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(unsigned long)dspo_res.p_dspo->io,
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dspo_res.p_dspo->irq);
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if (dspo_res.p_dspo->clk && dspo_res.p_dspo->clk_parent)
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count += sprintf(
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buf + count, "real clk rate:%lu and real clk "
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"parent rate:%lu, rate to be "
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"set:%u\n",
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clk_get_rate(dspo_res.p_dspo->clk),
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clk_get_rate(dspo_res.p_dspo->clk_parent),
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p_cfg->timing_info.pixel_clk * 2);
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else
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count += sprintf(buf + count, "Get clk info fail!\n");
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} else {
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return sprintf(buf + count, "Get dspo info fail!\n");
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}
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} else
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return sprintf(buf + count, "NULL dspo device!\n");
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return count;
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}
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static DEVICE_ATTR(info, 0660,
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dspo_info_show, NULL);
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static struct attribute *dspo_attributes[] = {
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&dev_attr_info.attr,
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NULL
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};
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static struct attribute_group dspo_attribute_group = {
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.name = "attr",
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.attrs = dspo_attributes
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};
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static int init_dspo_device_from_dts(struct device *dev, struct dspo_device_t *p_dspo)
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{
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int value = 0, ret = -1;
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struct dspo_config_t cfg;
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memset(&cfg, 0, sizeof(struct dspo_config_t));
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ret = of_property_read_u32_array(dev->of_node, "enable", &value, 1);
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if (ret != 0 || value == 0)
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goto OUT;
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ret = of_property_read_u32_array(dev->of_node, "protocol", &value, 1);
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if (ret == 0)
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cfg.protocol = value;
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ret = of_property_read_u32_array(dev->of_node, "bit_width", &value, 1);
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if (ret == 0)
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cfg.bit_width = value;
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ret = of_property_read_u32_array(dev->of_node, "separate_sync", &value, 1);
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if (ret == 0)
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cfg.separate_sync = value;
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ret = of_property_read_u32_array(dev->of_node, "data_seq_sel", &value, 1);
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if (ret == 0)
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cfg.data_seq_sel = value;
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ret = of_property_read_u32_array(dev->of_node, "output_mode", &value, 1);
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if (ret == 0)
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cfg.output_mode = value;
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ret = of_property_read_u32_array(dev->of_node, "dclk_dly_en", &value, 1);
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if (ret == 0)
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cfg.dclk_set.dclk_en = value;
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ret = of_property_read_u32_array(dev->of_node, "dclk_dly_num", &value, 1);
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if (ret == 0)
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cfg.dclk_set.dclk_dly_num = value;
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ret = of_property_read_u32_array(dev->of_node, "dclk_invert", &value, 1);
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if (ret == 0)
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cfg.dclk_set.dclk_invt = value;
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if (cfg.output_mode == DSPO_CUSTOM_MODE) {
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ret = of_property_read_u32_array(dev->of_node, "pixel_clk", &value, 1);
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if (ret == 0)
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cfg.timing_info.pixel_clk = value;
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ret = of_property_read_u32_array(dev->of_node, "x_res", &value, 1);
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if (ret == 0)
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cfg.timing_info.x_res = value;
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ret = of_property_read_u32_array(dev->of_node, "y_res", &value, 1);
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if (ret == 0)
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cfg.timing_info.y_res = value;
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ret = of_property_read_u32_array(dev->of_node, "ht", &value, 1);
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if (ret == 0)
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cfg.timing_info.hor_total_time = value;
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ret = of_property_read_u32_array(dev->of_node, "hbp", &value, 1);
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if (ret == 0)
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cfg.timing_info.hor_back_porch = value;
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ret = of_property_read_u32_array(dev->of_node, "hfp", &value, 1);
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if (ret == 0)
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cfg.timing_info.hor_front_porch = value;
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ret = of_property_read_u32_array(dev->of_node, "hspw", &value, 1);
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if (ret == 0)
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cfg.timing_info.hor_sync_time = value;
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ret = of_property_read_u32_array(dev->of_node, "hpol", &value, 1);
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if (ret == 0)
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cfg.timing_info.hor_sync_polarity = value;
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ret = of_property_read_u32_array(dev->of_node, "vt", &value, 1);
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if (ret == 0)
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cfg.timing_info.ver_total_time = value;
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ret = of_property_read_u32_array(dev->of_node, "vbp", &value, 1);
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if (ret == 0)
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cfg.timing_info.ver_back_porch = value;
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ret = of_property_read_u32_array(dev->of_node, "vfp", &value, 1);
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if (ret == 0)
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cfg.timing_info.ver_front_porch = value;
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ret = of_property_read_u32_array(dev->of_node, "vspw", &value, 1);
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if (ret == 0)
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cfg.timing_info.ver_sync_time = value;
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ret = of_property_read_u32_array(dev->of_node, "vpol", &value, 1);
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if (ret == 0)
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cfg.timing_info.ver_sync_polarity = value;
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ret = of_property_read_u32_array(dev->of_node, "interlace", &value, 1);
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if (ret == 0)
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cfg.timing_info.b_interlace = value;
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}
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ret = p_dspo->enable(p_dspo, &cfg);
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OUT:
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return ret;
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}
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static int dspo_probe(struct platform_device *pdev)
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{
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int ret = 0;
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dspo_res.sunxi_dspo_dma_mask = DMA_BIT_MASK(32);
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platform_set_drvdata(pdev, &dspo_res);
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pdev->dev.dma_mask = &dspo_res.sunxi_dspo_dma_mask;
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pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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dspo_res.p_dspo = create_dspo_device(&pdev->dev);
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if (!dspo_res.p_dspo) {
|
||
|
|
pr_warn("Malloc dspo_device_t fail!\n");
|
||
|
|
goto OUT;
|
||
|
|
}
|
||
|
|
|
||
|
|
mutex_init(&dspo_res.mutex);
|
||
|
|
|
||
|
|
init_dspo_device_from_dts(&pdev->dev, dspo_res.p_dspo);
|
||
|
|
|
||
|
|
|
||
|
|
OUT:
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dspo_remove(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
sysfs_remove_group(&dspo_res.dev->kobj, &dspo_attribute_group);
|
||
|
|
return destroy_dspo_device(dspo_res.p_dspo);;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dspo_suspend(struct platform_device *pdev, pm_message_t state)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dspo_resume(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct platform_driver dspo_driver = {
|
||
|
|
.probe = dspo_probe,
|
||
|
|
.remove = dspo_remove,
|
||
|
|
.suspend = dspo_suspend,
|
||
|
|
.resume = dspo_resume,
|
||
|
|
.driver = {
|
||
|
|
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
.name = "dspo",
|
||
|
|
.of_match_table = sunxi_dspo_match,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
int __init dspo_module_init(void)
|
||
|
|
{
|
||
|
|
int ret = 0;
|
||
|
|
|
||
|
|
memset(&dspo_res, 0, sizeof(struct dspo_resource_t));
|
||
|
|
alloc_chrdev_region(&dspo_res.dev_id, 0, 1, "dspo_chrdev");
|
||
|
|
dspo_res.dspo_cdev = cdev_alloc();
|
||
|
|
cdev_init(dspo_res.dspo_cdev, &dspo_fops);
|
||
|
|
dspo_res.dspo_cdev->owner = THIS_MODULE;
|
||
|
|
ret = cdev_add(dspo_res.dspo_cdev, dspo_res.dev_id, 1);
|
||
|
|
if (ret) {
|
||
|
|
pr_warn("cdev_add fail:%d\n", ret);
|
||
|
|
goto OUT;
|
||
|
|
}
|
||
|
|
|
||
|
|
dspo_res.dspo_class = class_create(THIS_MODULE, "dspo");
|
||
|
|
if (IS_ERR_OR_NULL(dspo_res.dspo_class)) {
|
||
|
|
ret = PTR_ERR(dspo_res.dspo_class);
|
||
|
|
pr_warn("create class error:%d\n", ret);
|
||
|
|
goto OUT;
|
||
|
|
}
|
||
|
|
|
||
|
|
dspo_res.dev = device_create(dspo_res.dspo_class, NULL, dspo_res.dev_id, NULL, "dspo");
|
||
|
|
if (IS_ERR_OR_NULL(dspo_res.dev)) {
|
||
|
|
ret = PTR_ERR(dspo_res.dev);
|
||
|
|
pr_warn("device_create dspo fail!:%d\n", ret);
|
||
|
|
} else {
|
||
|
|
ret = platform_driver_register(&dspo_driver);
|
||
|
|
if (ret)
|
||
|
|
pr_warn("platform_driver_register fail:%d\n", ret);
|
||
|
|
else
|
||
|
|
pr_info("module dspo :%d init finish\n", MAJOR(dspo_res.dev_id));
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = sysfs_create_group(&dspo_res.dev->kobj, &dspo_attribute_group);
|
||
|
|
if (ret < 0)
|
||
|
|
pr_warn("sysfs_create_file fail!\n");
|
||
|
|
|
||
|
|
OUT:
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void __exit dspo_module_exit(void)
|
||
|
|
{
|
||
|
|
pr_info("dspo_module_exit\n");
|
||
|
|
|
||
|
|
platform_driver_unregister(&dspo_driver);
|
||
|
|
device_destroy(dspo_res.dspo_class, dspo_res.dev_id);
|
||
|
|
class_destroy(dspo_res.dspo_class);
|
||
|
|
|
||
|
|
cdev_del(dspo_res.dspo_cdev);
|
||
|
|
}
|
||
|
|
|
||
|
|
subsys_initcall_sync(dspo_module_init);
|
||
|
|
module_exit(dspo_module_exit);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("zxb <zhengxiaobin@allwinnertech.com>");
|
||
|
|
MODULE_DESCRIPTION("dspo driver");
|
||
|
|
MODULE_LICENSE("GPL");
|