530 lines
13 KiB
C
530 lines
13 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* sunxi's Remote Processor Share Interrupt Driver
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*
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* Copyright (C) 2022 Allwinnertech - All Rights Reserved
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*
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* Author: lijiajian <lijiajian@allwinnertech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/irq.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/interrupt.h>
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#include <linux/debugfs.h>
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#include "sunxi_share_interrupt.h"
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#define irm_debug(fmt, ...) pr_debug("Sunxi IRM %s:%d " fmt,\
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__func__, __LINE__, ##__VA_ARGS__)
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#define irm_warn(fmt, ...) pr_warn("Sunxi IRM %s:%d " fmt,\
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__func__, __LINE__, ##__VA_ARGS__)
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#define irm_err(fmt, ...) pr_err("Sunxi IRM %s:%d " fmt,\
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__func__, __LINE__, ##__VA_ARGS__)
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#define IRQ_NP_NAME "reserved-irq"
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#define CPU_BANK_NUM 16
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#define READY_TAG (('R' << 24) | ('E' << 16) | ('D' << 8) | 'Y')
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#define USED_TAG (('U' << 24) | ('S' << 16) | ('E' << 8) | 'D')
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#define GET_INFO_MAJOR(info, i) (info[i * 3 + 0])
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#define GET_INFO_TYPE(info, i) (info[i * 3 + 1])
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#define GET_INFO_FLAGS(info, i) (info[i * 3 + 2])
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#define IS_GPIO_TYPE(type) (!!(type))
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#define GET_GPIO_INDEX(type) ((type) - 1)
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struct _table_head {
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uint32_t tag;
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uint32_t len;
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uint32_t banks_off;
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uint32_t banks_num;
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} __packed;
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struct _table_entry {
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uint32_t status;
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uint32_t type;
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uint32_t flags;
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uint32_t arch_irq;
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} __packed;
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struct arch_irq {
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const char *name;
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bool visable;
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/*
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* info format
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* major, type, flags
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*/
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uint32_t *info;
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uint32_t entris;
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/*
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* Table Format：
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* The first 16 byte is reserved for _table_head
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* The last CPU_BANK_NUM word is resource for gpio mask
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*
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* ----------------
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* | _table_head |
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* ----------------
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* | _table_entry |
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* ----------------
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* | ... |
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* ----------------
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* | GPIOA Mask |
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* ----------------
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* | ... |
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* ---------------
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*/
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void __iomem *table_addr;
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uint32_t len;
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/*
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* record Interrupt Status
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* 0 : Disable
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* 1 : Enable
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*/
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uint8_t *status;
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/*
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* record GPIO Alloc Status
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* 0 : Host
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* 1 : Arch
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*/
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uint32_t gpio_banks[CPU_BANK_NUM];
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/*
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* record GPIO IRQ number mapping with bank number
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* [banks][0] = hwirq
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* [banks][1] = softirq
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*/
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uint32_t gpio_irq_map[CPU_BANK_NUM][2];
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};
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static uint32_t g_arch_number;
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static struct arch_irq *g_arch_array;
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static int sunxi_init_arch_info(struct device_node *child, struct arch_irq *arch)
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{
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const char *name;
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struct device_node *mem_np;
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struct resource r;
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void __iomem *va;
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int ret;
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arch->visable = false;
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ret = of_property_read_string(child, "arch-name", &name);
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if (ret < 0) {
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irm_err("Can't find arch-name property.\n");
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return -EINVAL;
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}
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arch->name = name;
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mem_np = of_parse_phandle(child, "memory-region", 0);
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if (IS_ERR_OR_NULL(mem_np)) {
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irm_err("Can't find memory-region property.\n");
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return -EINVAL;
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}
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ret = of_address_to_resource(mem_np, 0, &r);
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if (ret) {
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irm_err("Failed to get memory-region address range,ret=%d.\n", ret);
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return -EFAULT;
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}
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va = ioremap_wc(r.start, resource_size(&r));
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if (IS_ERR_OR_NULL(va)) {
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irm_err("Fialed to remap memory-region\n");
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return -ENOMEM;
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}
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arch->table_addr = va;
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arch->len = resource_size(&r);
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irm_debug("map table from 0x%zx to 0x%p\n", r.start, va);
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ret = of_property_count_elems_of_size(child, "share-irq", 3 * sizeof(u32));
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if (ret < 0) {
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irm_err("fail to get share-irq\n");
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return -ENXIO;
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}
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arch->entris = ret;
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arch->info = kzalloc(ret * 3 * sizeof(u32), GFP_KERNEL);
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if (IS_ERR_OR_NULL(arch->info)) {
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irm_warn("Failed to alloc info array,ret=%d.\n", ret);
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return -ENOMEM;
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}
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ret = of_property_read_u32_array(child, "share-irq", arch->info, arch->entris * 3);
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if (ret < 0) {
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irm_err("Failed to read share-irq property,ret=%d\n", ret);
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return -EFAULT;
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}
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arch->status = kzalloc(ARRAY_SIZE(share_irq_table), GFP_KERNEL);
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if (IS_ERR_OR_NULL(arch->status)) {
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irm_warn("Failed to alloc info status array,ret=%d.\n", ret);
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kfree(arch->info);
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return -ENOMEM;
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}
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return 0;
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}
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static void sunxi_update_gpio_mask(struct arch_irq *arch)
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{
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int i, j;
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uint32_t type, index, major, mask;
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irm_debug("%s gpio irq map:\n", arch->name);
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/* update gpio softirq info */
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for (i = 0; i < arch->entris; i++) {
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type = GET_INFO_TYPE(arch->info, i);
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major = GET_INFO_MAJOR(arch->info, i);
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index = GET_GPIO_INDEX(type);
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if (!IS_GPIO_TYPE(type))
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continue;
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for (j = 0; j < ARRAY_SIZE(share_irq_table); j++) {
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if (share_irq_table[j].major == major) {
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arch->gpio_irq_map[index][0] = share_irq_table[j].hwirq;
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arch->gpio_irq_map[index][1] = share_irq_table[j].softirq;
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irm_debug("\tGPIO%c -> %d\n", index, arch->gpio_irq_map[index][1]);
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break;
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}
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}
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}
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irm_debug("\n");
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irm_debug("%s info:\n", arch->name);
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/* update info to globle gpio banks */
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for (i = 0; i < arch->entris; i++) {
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type = GET_INFO_TYPE(arch->info, i);
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mask = GET_INFO_FLAGS(arch->info, i);
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index = GET_GPIO_INDEX(type);
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irm_debug("\t0x%x 0x%x 0x%08x\n", GET_INFO_MAJOR(arch->info, i), type, mask);
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if (!IS_GPIO_TYPE(type))
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continue;
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if (arch->gpio_banks[index] & mask)
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irm_warn("Incompatible GPIO PIN:0x%x.\n", (arch->gpio_banks[index] & mask));
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arch->gpio_banks[index] |= mask;
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}
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irm_debug("\n");
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}
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static void sunxi_update_table(struct arch_irq *arch)
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{
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int i, j;
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uint32_t major, offset, type, hwirq, flags;
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struct _table_entry *ptable;
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struct _table_head *phead;
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uint32_t *gpio_mask;
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phead = arch->table_addr;
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ptable = arch->table_addr + sizeof(*phead);
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irm_debug("%s info:\n", arch->name);
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irm_debug("\t head address %p:\n", phead);
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irm_debug("\t Entry address %p:\n", ptable);
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if (phead->tag != USED_TAG)
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memset(arch->table_addr, 0, arch->len);
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/* update info to globle interrupt table */
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for (i = 0; i < arch->entris; i++) {
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major = GET_INFO_MAJOR(arch->info, i);
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type = GET_INFO_TYPE(arch->info, i);
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flags = GET_INFO_FLAGS(arch->info, i);
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for (j = 0; j < ARRAY_SIZE(share_irq_table); j++) {
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hwirq = share_irq_table[j].hwirq;
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if (share_irq_table[j].major != major)
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continue;
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irm_debug("\tUpdate Entry %d irq to %s.\n", hwirq, arch->name);
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irm_debug("\t\tEntry status = 1\n");
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irm_debug("\t\tEntry type = 0x%x\n", type);
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irm_debug("\t\tEntry flags = 0x%x\n", flags);
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irm_debug("\t\tEntry IRQ = %d\n", share_irq_table[j].arch_irq);
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ptable[hwirq].status = 1;
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ptable[hwirq].type = type;
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ptable[hwirq].flags = flags;
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ptable[hwirq].arch_irq = share_irq_table[j].arch_irq;
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}
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}
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/* update gpio banks info to table */
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gpio_mask = arch->table_addr + arch->len - CPU_BANK_NUM * sizeof(uint32_t);
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irm_debug("Update GPIO Banks Table from 0x%p to 0x%p.\n", arch->gpio_banks, gpio_mask);
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memcpy(gpio_mask, arch->gpio_banks, CPU_BANK_NUM * sizeof(uint32_t));
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/* mark globle interrupt table ready */
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offset = (uint32_t)((unsigned long)gpio_mask - (unsigned long)(arch->table_addr));
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phead->tag = READY_TAG;
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phead->len = arch->len;
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phead->banks_off = offset;
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phead->banks_num = CPU_BANK_NUM;
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irm_debug("%s Table Ready.\n", arch->name);
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irm_debug("\n");
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}
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static struct arch_irq *sunxi_find_arch_by_name(const char *name)
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{
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int i;
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struct arch_irq *arch;
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for (i = 0; i < g_arch_number; i++) {
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arch = &g_arch_array[i];
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if (strcmp(name, arch->name))
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continue;
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return arch;
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}
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return NULL;
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}
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int sunxi_arch_interrupt_save(const char *name)
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{
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int i, j;
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struct arch_irq *arch;
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uint32_t type, mask, major;
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arch = sunxi_find_arch_by_name(name);
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if (!arch) {
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irm_warn("No such %s arch name.\n", name);
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return -ENODEV;
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}
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sunxi_update_table(arch);
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/* save normal interrupt */
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for (i = 0; i < arch->entris; i++) {
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type = GET_INFO_TYPE(arch->info, i);
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major = GET_INFO_MAJOR(arch->info, i);
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if (IS_GPIO_TYPE(type))
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continue;
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for (j = 0; j < ARRAY_SIZE(share_irq_table); j++) {
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if (share_irq_table[j].major != major)
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continue;
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/* TODO: host is enable this tnterrupt? */
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if (!can_request_irq(share_irq_table[j].softirq, 0))
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arch->status[j] = 1;
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arch->status[j] = 0;
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}
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}
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/* save gpio interrupt */
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for (i = 0; i < arch->entris; i++) {
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major = GET_INFO_MAJOR(arch->info, i);
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type = GET_INFO_TYPE(arch->info, i);
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mask = GET_INFO_FLAGS(arch->info, i);
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if (!IS_GPIO_TYPE(type))
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continue;
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if (mask != 0xffffffff)
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continue;
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for (j = 0; j < ARRAY_SIZE(share_irq_table); j++) {
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if (share_irq_table[j].major == major) {
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arch->status[j] = 1;
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disable_irq(share_irq_table[j].softirq);
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break;
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}
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}
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}
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arch->visable = true;
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return 0;
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}
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EXPORT_SYMBOL(sunxi_arch_interrupt_save);
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int sunxi_arch_interrupt_restore(const char *name)
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{
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int i;
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|
struct arch_irq *arch;
|
|||
|
|
uint32_t type, major;
|
|||
|
|
struct _table_head *phead;
|
|||
|
|
|
|||
|
|
arch = sunxi_find_arch_by_name(name);
|
|||
|
|
if (!arch) {
|
|||
|
|
irm_warn("No such %s arch name.\n", name);
|
|||
|
|
return -ENODEV;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
phead = arch->table_addr;
|
|||
|
|
/* restore all interrupt */
|
|||
|
|
for (i = 0; i < ARRAY_SIZE(share_irq_table); i++) {
|
|||
|
|
type = GET_INFO_TYPE(arch->info, i);
|
|||
|
|
major = GET_INFO_MAJOR(arch->info, i);
|
|||
|
|
|
|||
|
|
if (!arch->status[i])
|
|||
|
|
continue;
|
|||
|
|
enable_irq(share_irq_table[i].softirq);
|
|||
|
|
}
|
|||
|
|
memset(arch->status, 0, ARRAY_SIZE(share_irq_table));
|
|||
|
|
arch->visable = false;
|
|||
|
|
phead->tag = 0;
|
|||
|
|
|
|||
|
|
return 0;
|
|||
|
|
}
|
|||
|
|
EXPORT_SYMBOL(sunxi_arch_interrupt_restore);
|
|||
|
|
|
|||
|
|
uint32_t sunxi_rproc_get_gpio_mask(int softirq)
|
|||
|
|
{
|
|||
|
|
int i, j;
|
|||
|
|
uint32_t mask = 0;
|
|||
|
|
struct arch_irq *arch;
|
|||
|
|
|
|||
|
|
for (i = 0; i < g_arch_number; i++) {
|
|||
|
|
arch = &g_arch_array[i];
|
|||
|
|
if (!arch->visable)
|
|||
|
|
continue;
|
|||
|
|
|
|||
|
|
/* trans softirq to banks */
|
|||
|
|
for (j = 0; j < CPU_BANK_NUM; j++) {
|
|||
|
|
if (arch->gpio_irq_map[j][1] == softirq) {
|
|||
|
|
mask |= arch->gpio_banks[j];
|
|||
|
|
break;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return mask;
|
|||
|
|
}
|
|||
|
|
EXPORT_SYMBOL(sunxi_rproc_get_gpio_mask);
|
|||
|
|
|
|||
|
|
uint32_t sunxi_rproc_get_gpio_mask_by_hwirq(int hwirq)
|
|||
|
|
{
|
|||
|
|
int i, j;
|
|||
|
|
uint32_t mask = 0;
|
|||
|
|
struct arch_irq *arch;
|
|||
|
|
|
|||
|
|
for (i = 0; i < g_arch_number; i++) {
|
|||
|
|
arch = &g_arch_array[i];
|
|||
|
|
if (!arch->visable)
|
|||
|
|
continue;
|
|||
|
|
|
|||
|
|
/* trans softirq to banks */
|
|||
|
|
for (j = 0; j < CPU_BANK_NUM; j++) {
|
|||
|
|
if (arch->gpio_irq_map[j][0] == hwirq) {
|
|||
|
|
mask |= arch->gpio_banks[j];
|
|||
|
|
break;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return mask;
|
|||
|
|
}
|
|||
|
|
EXPORT_SYMBOL(sunxi_rproc_get_gpio_mask_by_hwirq);
|
|||
|
|
|
|||
|
|
static ssize_t sunxi_arch_irq_info_read(struct file *filp, char __user *userbuf,
|
|||
|
|
size_t count, loff_t *ppos)
|
|||
|
|
{
|
|||
|
|
struct arch_irq *arch = filp->private_data;
|
|||
|
|
/* need room for the name, a newline and a terminating null */
|
|||
|
|
char buf[1024];
|
|||
|
|
int i, j;
|
|||
|
|
|
|||
|
|
i = scnprintf(buf, sizeof(buf), "Status: %s\n",
|
|||
|
|
arch->visable ? "Active" : "Inactive");
|
|||
|
|
for (j = 0; j < CPU_BANK_NUM; j++) {
|
|||
|
|
i += scnprintf(buf + i, sizeof(buf) - i, "\tGPIO%c: 0x%08x\n",
|
|||
|
|
'A' + j, arch->gpio_banks[j]);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return simple_read_from_buffer(userbuf, count, ppos, buf, i);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static const struct file_operations sunxi_irq_info_ops = {
|
|||
|
|
.read = sunxi_arch_irq_info_read,
|
|||
|
|
.open = simple_open,
|
|||
|
|
.llseek = generic_file_llseek,
|
|||
|
|
};
|
|||
|
|
|
|||
|
|
int sunxi_arch_create_debug_dir(struct dentry *dir, const char *name)
|
|||
|
|
{
|
|||
|
|
struct arch_irq *arch;
|
|||
|
|
|
|||
|
|
if (!dir) {
|
|||
|
|
irm_warn("Invalid debug dir.\n");
|
|||
|
|
return -EINVAL;
|
|||
|
|
}
|
|||
|
|
arch = sunxi_find_arch_by_name(name);
|
|||
|
|
if (!arch) {
|
|||
|
|
irm_warn("No such %s arch name.\n", name);
|
|||
|
|
return -ENODEV;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
debugfs_create_file("share-interrupt", 0400, dir,
|
|||
|
|
arch, &sunxi_irq_info_ops);
|
|||
|
|
|
|||
|
|
return 0;
|
|||
|
|
}
|
|||
|
|
EXPORT_SYMBOL(sunxi_arch_create_debug_dir);
|
|||
|
|
|
|||
|
|
static int __init sunxi_share_resource_init(void)
|
|||
|
|
{
|
|||
|
|
struct device_node *np, *child;
|
|||
|
|
int cnt, i;
|
|||
|
|
|
|||
|
|
if (g_arch_array) {
|
|||
|
|
irm_warn("Sunxi Interrupt Resource Already Init.\n");
|
|||
|
|
return 0;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* mapping hardware interrupt */
|
|||
|
|
for (i = 0; i < ARRAY_SIZE(share_irq_table); i++) {
|
|||
|
|
share_irq_table[i].softirq = irqnum_trans_from_hwirq(share_irq_table[i].hwirq);
|
|||
|
|
irm_err("Trans IRQ: %d -> %d\n", share_irq_table[i].hwirq,
|
|||
|
|
share_irq_table[i].softirq);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
np = of_find_node_by_name(NULL, IRQ_NP_NAME);
|
|||
|
|
if (!np) {
|
|||
|
|
irm_err("Can't Find reserved-irq node in dts.\n");
|
|||
|
|
return -ENOMEM;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
cnt = of_get_child_count(np);
|
|||
|
|
irm_debug("Child Cnt=%d\n", cnt);
|
|||
|
|
g_arch_number = cnt;
|
|||
|
|
|
|||
|
|
g_arch_array = kzalloc(cnt * sizeof(*g_arch_array), GFP_KERNEL);
|
|||
|
|
if (IS_ERR_OR_NULL(g_arch_array)) {
|
|||
|
|
irm_err("Alloc Resource Table Failed,ret=%ld.\n",
|
|||
|
|
PTR_ERR(g_arch_array));
|
|||
|
|
g_arch_array = NULL;
|
|||
|
|
return -ENOMEM;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
cnt = 0;
|
|||
|
|
for_each_child_of_node(np, child) {
|
|||
|
|
if (sunxi_init_arch_info(child, &g_arch_array[cnt]))
|
|||
|
|
goto out;
|
|||
|
|
sunxi_update_gpio_mask(&g_arch_array[cnt]);
|
|||
|
|
sunxi_update_table(&g_arch_array[cnt]);
|
|||
|
|
cnt++;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return 0;
|
|||
|
|
out:
|
|||
|
|
for (i = 0; i < cnt; i++) {
|
|||
|
|
g_arch_array[i].name = NULL;
|
|||
|
|
if (g_arch_array[i].info)
|
|||
|
|
kfree(g_arch_array[i].info);
|
|||
|
|
if (g_arch_array[i].table_addr)
|
|||
|
|
iounmap(g_arch_array[i].table_addr);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return -EINVAL;
|
|||
|
|
}
|
|||
|
|
early_initcall(sunxi_share_resource_init);
|
|||
|
|
|
|||
|
|
MODULE_DESCRIPTION("SUNXI Remote Processor Share IRQ Driver");
|
|||
|
|
MODULE_AUTHOR("lijiajian <lijiajian@allwinnertech.com>");
|
|||
|
|
MODULE_LICENSE("GPL v2");
|