172 lines
9.9 KiB
C
172 lines
9.9 KiB
C
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/*
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* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
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*
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* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
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* the the People's Republic of China and other countries.
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* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
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*
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* DISCLAIMER
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* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
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* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
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* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
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* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
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* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
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* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
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* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
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* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
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* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
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* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SOC_H_
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#define _SOC_H_
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef IHS_VALUE
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#define IHS_VALUE (24000000)
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#endif
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#ifndef EHS_VALUE
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#define EHS_VALUE (24000000)
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#endif
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/* ------------------------- Interrupt Number Definition ------------------------ */
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typedef enum IRQn
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{
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NMI_EXPn = -2, /* NMI Exception */
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/* ---------------------- SmartL Specific Interrupt Numbers --------------------- */
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Machine_Software_IRQn = 3, /* Machine software interrupt */
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User_Timer_IRQn = 4, /* User timer interrupt */
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Supervisor_Timer_IRQn = 5, /* Supervisor timer interrupt */
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CORET_IRQn = 7, /* core Timer Interrupt */
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Machine_External_IRQn = 11, /* Machine external interrupt */
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CPUX_MBOX_CPUX_IRQn = 16, /* CPUX MSGBOX READ IRQ FOR CPUX */
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CPUX_MBOX_E907_IRQn = 17, /* CPUX MSGBOX READ IRQ FOR E907 */
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UART0_IRQn = 18, /* uart0 Interrupt */
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UART1_IRQn = 19, /* uart1 Interrupt */
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UART2_IRQn = 20, /* uart2 Interrupt */
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UART3_IRQn = 21, /* uart3 Interrupt */
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TWI0_IRQn = 25, /* twi0 Interrupt */
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TWI1_IRQn = 26, /* twi1 Interrupt */
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TWI2_IRQn = 27, /* twi2 Interrupt */
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TWI3_IRQn = 28, /* twi3 Interrupt */
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TWI4_IRQn = 29, /* twi4 Interrupt */
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SPI0_IRQn = 31, /* spi0 Interrupt */
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SPI1_IRQn = 32, /* spi1 Interrupt */
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SPI2_IRQn = 33, /* spi2 Interrupt */
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PWM_IRQn = 34, /* pwm Interrupt */
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SPI_FLASH_IRQn = 35, /* spi flash Interrupt */
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WIEGAND_IRQn = 36, /* wiegand Interrupt */
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SPI3_IRQn = 37, /* spi3 Interrupt */
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DMIC_IRQn = 40, /* dmic Interrupt */
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AUDIO_CODEC_IRQn = 41, /* audio codec Interrupt */
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I2S_PCM0_IRQn = 42, /* i2s pcm0 Interrupt */
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I2S_PCM1_IRQn = 43, /* i2s pcm1 Interrupt */
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USB_OTG_IRQn = 45, /* usb otg Interrupt */
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USB_EHCI_IRQn = 46, /* usb ehci Interrupt */
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USB_OHCI_IRQn = 47, /* usb ohci Interrupt */
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SMHC0_IRQn = 56, /* smhc0 Interrupt */
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SMHC1_IRQn = 57, /* smhc1 Interrupt */
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SMHC2_IRQn = 58, /* smhc2 Interrupt */
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MSI_IRQn = 59, /* msi Interrupt */
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SMC_IRQn = 60, /* smc Interrupt */
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GMAC_IRQn = 62, /* gmac Interrupt */
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CCU_FERR_IRQn = 64, /* ccu ferr Interrupt */
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AHB_HREADY_TIME_OUT_IRQn = 65, /* ahb hready time out Interrupt */
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DMA_CPUX_NS_IRQn = 66, /* dma cpux ns Interrupt */
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DMA_CPUX_S_IRQn = 67, /* dma cpux s Interrupt */
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CE_NS_IRQn = 68, /* ce ns Interrupt */
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CE_S_IRQn = 69, /* ce s Interrupt */
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SPINLOCK_IRQn = 70, /* spinlock Interrupt */
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HSTIMER0_IRQn = 71, /* hstimer0 Interrupt */
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HSTIMER1_IRQn = 72, /* hstimer1 Interrupt */
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GPADC_IRQn = 73, /* gpadc Interrupt */
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THS_IRQn = 74, /* ths Interrupt */
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TIMER0_IRQn = 75, /* timer0 Interrupt */
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TIMER1_IRQn = 76, /* timer1 Interrupt */
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TIMER2_IRQn = 77, /* timer2 Interrupt */
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TIMER3_IRQn = 78, /* timer3 Interrupt */
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WDG_IRQn = 79, /* wdg Interrupt */
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IOMMU_IRQn = 80, /* iommu Interrupt */
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NPU_IRQn = 81, /* npu Interrupt */
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VE_IRQn = 82, /* ve Interrupt */
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GPIOA_NS_IRQn = 83, /* gpioa ns Interrupt */
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GPIOA_S_IRQn = 84, /* gpioa s Interrupt */
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GPIOC_NS_IRQn = 87, /* gpioc ns Interrupt */
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GPIOC_S_IRQn = 88, /* gpioc s Interrupt */
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GPIOD_NS_IRQn = 89, /* gpiod ns Interrupt */
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GPIOD_S_IRQn = 90, /* gpiod s Interrupt */
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GPIOE_NS_IRQn = 91, /* gpioe ns Interrupt */
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GPIOE_S_IRQn = 92, /* gpioe s Interrupt */
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GPIOF_NS_IRQn = 93, /* gpiof ns Interrupt */
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GPIOF_S_IRQn = 94, /* gpiof s Interrupt */
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GPIOG_NS_IRQn = 95, /* gpiog ns Interrupt */
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GPIOG_S_IRQn = 96, /* gpiog s Interrupt */
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GPIOH_NS_IRQn = 97, /* gpioh ns Interrupt */
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GPIOH_S_IRQn = 98, /* gpioh s Interrupt */
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GPIOI_NS_IRQn = 99, /* gpioi ns Interrupt */
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GPIOI_S_IRQn = 100, /* gpioi s Interrupt */
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DMAC_E907_NS_IRQn = 101, /* dmac e907 ns Interrupt */
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DMAC_E907_S_IRQn = 102, /* dmac e907 s Interrupt */
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DE_IRQn = 103, /* de Interrupt */
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G2D_IRQn = 105, /* g2d Interrupt */
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LCD_IRQn = 106, /* lcd Interrupt */
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DSI_IRQn = 108, /* dsi Interrupt */
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CSI_DMA0_IRQn = 111, /* csi dma0 Interrupt */
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CSI_DMA1_IRQn = 112, /* csi dma1 Interrupt */
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CSI_DMA2_IRQn = 113, /* csi dma2 Interrupt */
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CSI_DMA3_IRQn = 114, /* csi dma3 Interrupt */
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CSI_PARSER0_IRQn = 116, /* csi parser0 Interrupt */
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CSI_PARSER1_IRQn = 117, /* csi parser1 Interrupt */
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CSI_PARSER2_IRQn = 118, /* csi parser2 Interrupt */
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CSI_CMB_IRQn = 120, /* csi cmb Interrupt */
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CSI_TDM_IRQn = 121, /* csi tdm Interrupt */
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CSI_TOP_PKT_IRQn = 122, /* csi top pkt Interrupt */
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CSI_ISP0_IRQn = 124, /* csi isp0 Interrupt */
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CSI_ISP1_IRQn = 125, /* csi isp1 Interrupt */
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CSI_ISP2_IRQn = 126, /* csi isp2 Interrupt */
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CSI_ISP3_IRQn = 127, /* csi isp3 Interrupt */
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VIPP0_IRQn = 128, /* vipp0 Interrupt */
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VIPP1_IRQn = 129, /* vipp1 Interrupt */
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VIPP2_IRQn = 130, /* vipp2 Interrupt */
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VIPP3_IRQn = 131, /* vipp3 Interrupt */
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E907_MBOX_E907_IRQn = 144, /* e907 msgbox read irq for e907 Interrupt */
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E907_MBOX_CPUX_IRQn = 145, /* e907 msgbox write irq for cpux Interrupt */
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E907_WDG_IRQn = 146, /* e907 wdg Interrupt */
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E907_TIMER0_IRQn = 147, /* e907 timer0 Interrupt */
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E907_TIMER1_IRQn = 148, /* e907 timer1 Interrupt */
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E907_TIMER2_IRQn = 149, /* e907 timer2 Interrupt */
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E907_TIMER3_IRQn = 150, /* e907 timer3 Interrupt */
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NMI_IRQn = 152, /* nmi Interrupt */
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PPU_IRQn = 153, /* ppu Interrupt */
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ALARM_IRQn = 154, /* alarm Interrupt */
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AHBS_HREADY_TIME_OUT_IRQn = 155, /* cpus ahb ready time out irq Interrupt */
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PMC_IRQn = 156, /* pmc Interrupt */
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GIC_C0_IRQn = 157, /* gic c0 Interrupt */
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TWD_IRQn = 158, /* twd Interrupt */
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}
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IRQn_Type;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC_H_ */
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