141 lines
3.2 KiB
C
141 lines
3.2 KiB
C
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/*
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* (C) Copyright 2013-2016
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*
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*/
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#ifndef _SS_H_
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#define _SS_H_
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#include <config.h>
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#include <arch/cpu.h>
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#define SS_N_BASE SUNXI_SS_BASE /* non security */
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#define SS_S_BASE (SUNXI_SS_BASE+0x800) /* security */
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#define SS_TDQ (SS_N_BASE + 0x00 + 0x800*ss_base_mode)
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#define SS_ICR (SS_N_BASE + 0x08 + 0x800*ss_base_mode)
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#define SS_ISR (SS_N_BASE + 0x0C + 0x800*ss_base_mode)
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#define SS_TLR (SS_N_BASE + 0x10 + 0x800*ss_base_mode)
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#define SS_TSR (SS_N_BASE + 0x14 + 0x800*ss_base_mode)
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#define SS_ERR (SS_N_BASE + 0x18 + 0x800*ss_base_mode)
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#define SS_TPR (SS_N_BASE + 0x1C + 0x800*ss_base_mode)
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/* #define SS_VER (SS_N_BASE + 0x90 + 0x800*ss_base_mode) */
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#define SS_VER (SS_N_BASE + 0x90)
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/* security */
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#define SS_S_TDQ (SS_S_BASE + 0x00)
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#define SS_S_CTR (SS_S_BASE + 0x04)
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#define SS_S_ICR (SS_S_BASE + 0x08)
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#define SS_S_ISR (SS_S_BASE + 0x0C)
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#define SS_S_TLR (SS_S_BASE + 0x10)
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#define SS_S_TSR (SS_S_BASE + 0x14)
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#define SS_S_ERR (SS_S_BASE + 0x18)
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#define SS_S_TPR (SS_S_BASE + 0x1C)
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/* non security */
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#define SS_N_TDQ (SS_N_BASE + 0x00)
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#define SS_N_ICR (SS_N_BASE + 0x08)
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#define SS_N_ISR (SS_N_BASE + 0x0C)
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#define SS_N_TLR (SS_N_BASE + 0x10)
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#define SS_N_TSR (SS_N_BASE + 0x14)
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#define SS_N_ERR (SS_N_BASE + 0x18)
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#define SS_N_TPR (SS_N_BASE + 0x1C)
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#define SHA1_160_MODE 0
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#define SHA2_256_MODE 1
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#define ALG_SHA256 (0x13)
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#define ALG_RSA (0x20)
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#define TRNG_BYTE_LEN (32)
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/*ctrl
*/
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#define CHN (0) /*channel id
*/
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#define IVE (8)
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#define LPKG (12) /*last package
*/
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#define DLAV (13) /*data length valid<69><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>,<2C><>Ҫ<EFBFBD><D2AA>Ϊ1,*/
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#define IE (16)
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#define MD5 (0)
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#define SHA1 (1)
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#define SHA244 (2)
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#define SHA256 (3)
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#define SHA384 (4)
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#define SHA512 (5)
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#define SM3 (6)
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#define TRNG (2)
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/*cmd
*/
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#define HASH_SEL 0
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#define HME 4
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#define RGB_SEL 8
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#define SUB_CMD 16
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/*CE_TLR
*/
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#define SYMM_TRPE 0
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#define HASH_RBG_TRPE 1
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#define ASYM_TRPE 2
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#define RAES_TRPE 3
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/*CE_ISR
*/
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#define SUCCESS 0x1
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#define FAIL 0x2
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#define CLEAN 0x3
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#define CHANNEL_0 0
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#define CHANNEL_1 1
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#define CHANNEL_2 2
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#define CHANNEL_3 3
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typedef struct sg {
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uint addr;
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uint length;
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} sg;
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typedef struct descriptor_queue {
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uint task_id;
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uint common_ctl;
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uint symmetric_ctl;
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uint asymmetric_ctl;
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uint key_descriptor;
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uint iv_descriptor;
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uint ctr_descriptor;
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uint data_len;
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sg source[8];
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sg destination[8];
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uint next_descriptor;
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uint reserved[3];
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} task_queue;
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typedef struct descriptor_queue_other {
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u32 ctrl;
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u32 cmd;
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u32 data_toal_len_addr;
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u32 hmac_prng_key_addr;
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u32 iv_addr;
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sg source[8];
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sg destination[8];
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u32 next_descriptor_addr;
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u32 reserved[3];
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} task_queue_other;
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void sunxi_ss_open(void);
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void sunxi_ss_close(void);
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int sunxi_sha_calc(u8 *dst_addr, u32 dst_len,
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u8 *src_addr, u32 src_len);
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s32 sunxi_rsa_calc(u8 *n_addr, u32 n_len,
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u8 *e_addr, u32 e_len,
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u8 *dst_addr, u32 dst_len,
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u8 *src_addr, u32 src_len);
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#endif /* #ifndef _SS_H_ */
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