910 lines
36 KiB
Plaintext
910 lines
36 KiB
Plaintext
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/{
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clocks {
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compatible = "allwinner,clk-init";
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device_type = "clocks";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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reg = <0x0 0x02001000 0x0 0x1000>, /*cpux space*/
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<0x0 0x07010000 0x0 0x400>, /*cpus space*/
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<0x0 0x07000000 0x0 0x4>;
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/* register fixed rate clock*/
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/* clk_losc: losc { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-clock"; */
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/* clock-frequency = <32768>; */
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/* clock-output-names = "losc"; */
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/* }; */
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/* clk_iosc: iosc { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-clock"; */
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/* clock-frequency = <16000000>; */
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/* clock-output-names = "iosc"; */
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/* }; */
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/* clk_osc48m: osc48m { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-clock"; */
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/* clock-frequency = <48000000>; */
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/* clock-output-names = "osc48m"; */
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/* }; */
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/* clk_hoscdiv32k: hoscdiv32k { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-clock"; */
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/* clock-frequency = <32768>; */
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/* clock-output-names = "hoscdiv32k"; */
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/* }; */
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/* clk_pll_periph0div25m:pll_periph0div25m { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-clock"; */
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/* clock-frequency = <25000000>; */
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/* clock-output-names = "pll_periph0div25m"; */
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/* }; */
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/* */
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/* [> register allwinner,pll-clock <] */
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/* clk_pll_cpu: pll_cpu { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,pll-clock"; */
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/* lock-mode = "new"; */
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/* clock-output-names = "pll_cpu"; */
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/* }; */
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/* clk_pll_ddr: pll_ddr { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,pll-clock"; */
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/* lock-mode = "new"; */
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/* clock-output-names = "pll_ddr"; */
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/* }; */
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clk_pll_periph0: pll_periph0 {
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#clock-cells = <0>;
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compatible = "allwinner,pll-clock";
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assigned-clock-rates = <600000000>;
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lock-mode = "new";
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clock-output-names = "pll_periph0";
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};
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clk_pll_periph0_2x: pll_periph0_2x {
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#clock-cells = <0>;
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compatible = "allwinner,pll-clock";
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assigned-clock-rates = <1200000000>;
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lock-mode = "new";
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clock-output-names = "pll_periph0_2x";
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};
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clk_pll_periph1_2x: pll_periph1_2x {
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#clock-cells = <0>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_periph1_2x";
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};
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clk_pll_periph1_300m: pll_periph1_300m {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph1_2x>;
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clock-mult = <1>;
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clock-div = <4>;
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clock-output-names = "pll_periph1_300m";
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};
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clk_pll_periph0_300m: pll_periph0_300m {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph0_2x>;
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clock-mult = <1>;
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clock-div = <4>;
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clock-output-names = "pll_periph0_300m";
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};
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clk_pll_periph0_150m: pll_periph1_150m {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph0_2x>;
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clock-mult = <1>;
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clock-div = <8>;
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clock-output-names = "pll_periph0_150m";
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};
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/* clk_pll_periph1: pll_periph1 {
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* #clock-cells = <0>;
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* compatible = "allwinner,pll-clock";
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* assigned-clock-rates = <600000000>;
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* lock-mode = "new";
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* clock-output-names = "pll_periph1";
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* };
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* clk_pll_gpu: pll_gpu {
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* #clock-cells = <0>;
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* compatible = "allwinner,pll-clock";
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* lock-mode = "new";
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* clock-output-names = "pll_gpu";
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* }; */
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clk_pll_video0x4: pll_video0x4 {
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#clock-cells = <0>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_video0x4";
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};
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clk_pll_video1x4: pll_video1x4 {
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#clock-cells = <0>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_video1x4";
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};
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clk_pll_video3x4: pll_video3x4 {
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#clock-cells = <0>;
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compatible = "allwinner,pll-clock";
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assigned-clock-rates = <1800000000>;
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lock-mode = "new";
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clock-output-names = "pll_video3x4";
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};
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clk_pll_video2: pll_video2 {
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#clock-cells = <0>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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assigned-clocks = <&clk_pll_video2>;
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assigned-clock-rates = <336000000>;
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clock-output-names = "pll_video2";
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};
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/* clk_pll_video3: pll_video3 {
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* #clock-cells = <0>;
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* compatible = "allwinner,pll-clock";
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* lock-mode = "new";
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* assigned-clocks = <&clk_pll_video3>;
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* assigned-clock-rates = <300000000>;
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* clock-output-names = "pll_video3";
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* };
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* clk_pll_ve: pll_ve {
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* #clock-cells = <0>;
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* compatible = "allwinner,pll-clock";
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* device_type = "clk_pll_ve";
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* lock-mode = "new";
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* [>assigned-clock-rates = <??><]
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* clock-output-names = "pll_ve";
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* };
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* clk_pll_com: pll_com {
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* #clock-cells = <0>;
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* compatible = "allwinner,pll-clock";
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* assigned-clocks = <&clk_pll_com>;
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* assigned-clock-rates = <600000000>;
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* lock-mode = "new";
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* clock-output-names = "pll_com";
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* };
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* clk_pll_audiox4: pll_audiox4 {
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* #clock-cells = <0>;
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* compatible = "allwinner,pll-clock";
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* assigned-clocks = <&clk_pll_audiox4>;
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* assigned-clock-rates = <98304000>;
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* lock-mode = "new";
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* clock-output-names = "pll_audiox4";
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* };
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* */
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/* register fixed factor clock*/
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clk_pll_periph0x2: pll_periph0x2 {
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#clock-cells = <0>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <&clk_pll_periph0>;
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clock-mult = <2>;
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clock-div = <1>;
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clock-output-names = "pll_periph0x2";
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};
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/* clk_pll_periph0x4: pll_periph0x4 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_periph0>; */
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/* clock-mult = <4>; */
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/* clock-div = <1>; */
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/* clock-output-names = "pll_periph0x4"; */
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/* }; */
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/* clk_periph32k: periph32k { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_periph0>; */
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/* clock-mult = <2>; */
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/* clock-div = <36621>; */
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/* clock-output-names = "periph32k"; */
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/* }; */
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/* clk_pll_periph1x2: pll_periph1x2 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_periph1>; */
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/* clock-mult = <2>; */
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/* clock-div = <1>; */
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/* clock-output-names = "pll_periph1x2"; */
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/* }; */
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/* clk_pll_comdiv5: pll_comdiv5 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_com>; */
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/* clock-mult = <1>; */
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/* clock-div = <5>; */
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/* clock-output-names = "pll_comdiv5"; */
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/* }; */
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/* clk_pll_audiox8: pll_audiox8 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_audiox4>; */
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/* clock-mult = <2>; */
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/* clock-div = <1>; */
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/* clock-output-names = "pll_audiox8"; */
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/* }; */
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/* */
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/* clk_pll_audio: pll_audio { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_audiox4>; */
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/* clock-mult = <1>; */
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/* clock-div = <4>; */
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/* clock-output-names = "pll_audio"; */
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/* }; */
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/* clk_pll_audiox2: pll_audiox2 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_audiox4>; */
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/* clock-mult = <1>; */
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/* clock-div = <2>; */
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/* clock-output-names = "pll_audiox2"; */
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/* }; */
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/* clk_pll_video0: pll_video0 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video0x4>; */
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/* clock-mult = <1>; */
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/* clock-div = <4>; */
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/* clock-output-names = "pll_video0"; */
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/* }; */
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/* clk_pll_video0x2: pll_video0x2 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video0x4>; */
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/* clock-mult = <1>; */
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/* clock-div = <2>; */
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/* clock-output-names = "pll_video0x2"; */
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/* }; */
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/* clk_pll_video1: pll_video1 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video1x4>; */
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/* clock-mult = <1>; */
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/* clock-div = <4>; */
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/* clock-output-names = "pll_video1"; */
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/* }; */
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/* clk_pll_video1x2: pll_video1x2 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video1x4>; */
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/* clock-mult = <1>; */
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/* clock-div = <2>; */
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/* clock-output-names = "pll_video1x2"; */
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/* }; */
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/* clk_pll_video2x2: pll_video2x2 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video2>; */
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/* clock-mult = <2>; */
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/* clock-div = <1>; */
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/* clock-output-names = "pll_video2x2"; */
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/* }; */
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/* clk_pll_video2x4: pll_video2x4 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video2>; */
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/* clock-mult = <4>; */
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/* clock-div = <1>; */
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/* clock-output-names = "pll_video2x4"; */
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/* }; */
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/* clk_pll_video3x2: pll_video3x2 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video3>; */
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/* clock-mult = <2>; */
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/* clock-div = <1>; */
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/* clock-output-names = "pll_video3x2"; */
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/* }; */
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/* clk_pll_video3x4: pll_video3x4 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_video3>; */
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/* clock-mult = <4>; */
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/* clock-div = <1>; */
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/* clock-output-names = "pll_video3x4"; */
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/* }; */
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/* clk_hoscd2: hoscd2 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_hosc>; */
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/* clock-mult = <1>; */
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/* clock-div = <2>; */
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/* clock-output-names = "hoscd2"; */
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/* }; */
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/* clk_osc48md4: osc48md4 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_osc48m>; */
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/* clock-mult = <1>; */
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/* clock-div = <4>; */
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/* clock-output-names = "osc48md4"; */
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/* }; */
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/* clk_pll_periph0d6: pll_periph0d6 { */
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/* #clock-cells = <0>; */
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/* compatible = "allwinner,fixed-factor-clock"; */
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/* clocks = <&clk_pll_periph0>; */
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/* clock-mult = <1>; */
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/* clock-div = <6>; */
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/* clock-output-names = "pll_periph0d6"; */
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/* }; */
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|
|
/* */
|
||
|
|
/* [> register allwinner,periph-clock <] */
|
||
|
|
/* clk_cpu: cpu { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,cpu-clock"; */
|
||
|
|
/* clock-output-names = "cpu"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_axi: axi { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "axi"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_cpuapb: cpuapb { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "cpuapb"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_psi: psi { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "psi"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ahb1: ahb1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "ahb1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ahb2: ahb2 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "ahb2"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ahb3: ahb3 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "ahb3"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_apb1: apb1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "apb1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_apb2: apb2 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "apb2"; */
|
||
|
|
/* }; */
|
||
|
|
clk_de0: de0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
assigned-clock-parents = <&clk_pll_video3x4>;
|
||
|
|
assigned-clock-rates = <600000000>;
|
||
|
|
assigned-clocks = <&clk_de0>;
|
||
|
|
clock-output-names = "de0";
|
||
|
|
};
|
||
|
|
clk_de1: de1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
assigned-clock-parents = <&clk_pll_periph0_300m>;
|
||
|
|
assigned-clock-rates = <300000000>;
|
||
|
|
assigned-clocks = <&clk_de1>;
|
||
|
|
clock-output-names = "de1";
|
||
|
|
};
|
||
|
|
/* clk_g2d: g2d {
|
||
|
|
* #clock-cells = <0>;
|
||
|
|
* compatible = "allwinner,periph-clock";
|
||
|
|
* clock-output-names = "g2d";
|
||
|
|
* assigned-clock-parents = <&clk_pll_periph0x2>;
|
||
|
|
* assigned-clock-rates = <300000000>;
|
||
|
|
* assigned-clocks = <&clk_g2d>;
|
||
|
|
* };
|
||
|
|
* */
|
||
|
|
clk_ee: ee {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
assigned-clock-parents = <&clk_pll_periph0x2>;
|
||
|
|
assigned-clock-rates = <300000000>;
|
||
|
|
assigned-clocks = <&clk_ee>;
|
||
|
|
clock-output-names = "ee";
|
||
|
|
};
|
||
|
|
clk_panel: panel {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
assigned-clock-parents = <&clk_pll_video2>;
|
||
|
|
assigned-clock-rates = <30000000>;
|
||
|
|
assigned-clocks = <&clk_panel>;
|
||
|
|
clock-output-names = "panel";
|
||
|
|
};
|
||
|
|
|
||
|
|
clk_sdmmc0_mod: sdmmc0_mod {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "sdmmc0_mod";
|
||
|
|
};
|
||
|
|
clk_sdmmc0_bus: sdmmc0_bus {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "sdmmc0_bus";
|
||
|
|
};
|
||
|
|
clk_sdmmc0_rst: sdmmc0_rst {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "sdmmc0_rst";
|
||
|
|
};
|
||
|
|
clk_sdmmc2_mod: sdmmc2_mod {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "sdmmc2_mod";
|
||
|
|
};
|
||
|
|
clk_sdmmc2_bus: sdmmc2_bus {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "sdmmc2_bus";
|
||
|
|
};
|
||
|
|
clk_sdmmc2_rst: sdmmc2_rst {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "sdmmc2_rst";
|
||
|
|
};
|
||
|
|
|
||
|
|
/* clk_gpu: gpu { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "gpu"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ce: ce { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "ce"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ve: ve { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "ve"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_dma: dma { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "dma"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_msgbox: msgbox { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "msgbox"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_hwspinlock_rst: hwspinlock_rst { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "hwspinlock_rst"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_hwspinlock_bus: hwspinlock_bus { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "hwspinlock_bus"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_hstimer: hstimer { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "hstimer"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_avs: avs { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "avs"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_dbgsys: dbgsys { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "dbgsys"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_pwm: pwm { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "pwm"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_iommu: iommu { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "iommu"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_nand0: nand0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "nand0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_nand1: nand1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "nand1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc0_mod: sdmmc0_mod { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc0_mod"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc0_bus: sdmmc0_bus { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc0_bus"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc0_rst: sdmmc0_rst { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc0_rst"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc1_mod: sdmmc1_mod { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc1_mod"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc1_bus: sdmmc1_bus { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc1_bus"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc1_rst: sdmmc1_rst { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc1_rst"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc2_mod: sdmmc2_mod { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc2_mod"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc2_bus: sdmmc2_bus { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc2_bus"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_sdmmc2_rst: sdmmc2_rst { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "sdmmc2_rst"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_uart0: uart0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "uart0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_uart1: uart1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "uart1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_uart2: uart2 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "uart2"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_uart3: uart3 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "uart3"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_uart4: uart4 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "uart4"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_uart5: uart5 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "uart5"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_uart6: uart6 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "uart6"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_scr0: scr0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "scr0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_gmac0_25m: gmac0_25m { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "gmac0_25m"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_gmac1_25m: gmac1_25m { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "gmac1_25m"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_gmac0: gmac0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "gmac0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_gmac1: gmac1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "gmac1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_gpadc: gpadc { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "gpadc"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_irtx: irtx { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "irtx"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ths: ths { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "ths"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_i2s0: i2s0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "i2s0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_i2s1: i2s1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "i2s1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_i2s2: i2s2 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "i2s2"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_i2s3: i2s3 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "i2s3"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_spdif: spdif { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "spdif"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_dmic: dmic { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "dmic"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_codec_dac_1x: codec_dac_1x { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "codec_dac_1x"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_codec_adc_1x: codec_adc_1x { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "codec_adc_1x"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_codec_4x: codec_4x { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "codec_4x"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbphy0: usbphy0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbphy0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbphy1: usbphy1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbphy1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbohci0: usbohci0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbohci0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbohci0_12m: usbohci0_12m { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbohci0_12m"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbohci1: usbohci1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbohci1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbohci1_12m: usbohci1_12m { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbohci1_12m"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbehci0: usbehci0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbehci0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbehci1: usbehci1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbehci1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_usbotg: usbotg { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "usbotg"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_display_top: display_top {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "display_top";
|
||
|
|
}; */
|
||
|
|
clk_dpss_top0: dpss_top0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "dpss_top0";
|
||
|
|
};
|
||
|
|
/* clk_dpss_top1: dpss_top1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "dpss_top1";
|
||
|
|
}; */
|
||
|
|
|
||
|
|
clk_tcon_lcd0: tcon_lcd0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "tcon_lcd0";
|
||
|
|
assigned-clocks = <&clk_tcon_lcd0>;
|
||
|
|
assigned-clock-parents = <&clk_pll_video0x4>;
|
||
|
|
};
|
||
|
|
clk_tcon_lcd1: tcon_lcd1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "tcon_lcd1";
|
||
|
|
assigned-clocks = <&clk_tcon_lcd1>;
|
||
|
|
assigned-clock-parents = <&clk_pll_video0x4>;
|
||
|
|
};
|
||
|
|
clk_tcon_lcd2: tcon_lcd2 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "tcon_lcd2";
|
||
|
|
assigned-clocks = <&clk_tcon_lcd2>;
|
||
|
|
assigned-clock-parents = <&clk_pll_video0x4>;
|
||
|
|
};
|
||
|
|
clk_lvds0: lvds0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "lvds0";
|
||
|
|
};
|
||
|
|
clk_lvds1: lvds1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "lvds1";
|
||
|
|
};
|
||
|
|
clk_mipi_dsi0: mipi_dsi0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "mipi_dsi0";
|
||
|
|
assigned-clocks = <&clk_mipi_dsi0>;
|
||
|
|
assigned-clock-parents = <&clk_pll_periph0_150m>;
|
||
|
|
assigned-clock-rates = <150000000>;
|
||
|
|
};
|
||
|
|
clk_mipi_dsi1: mipi_dsi1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "mipi_dsi1";
|
||
|
|
assigned-clocks = <&clk_mipi_dsi1>;
|
||
|
|
assigned-clock-parents = <&clk_pll_periph0_150m>;
|
||
|
|
assigned-clock-rates = <150000000>;
|
||
|
|
};
|
||
|
|
clk_mipi_dsi_combphy0: mipi_dsi_combphy0 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "mipi_dsi_combphy0";
|
||
|
|
assigned-clocks = <&clk_mipi_dsi_combphy0>;
|
||
|
|
assigned-clock-parents = <&clk_pll_video0x4>;
|
||
|
|
};
|
||
|
|
clk_mipi_dsi_combphy1: mipi_dsi_combphy1 {
|
||
|
|
#clock-cells = <0>;
|
||
|
|
compatible = "allwinner,periph-clock";
|
||
|
|
clock-output-names = "mipi_dsi_combphy1";
|
||
|
|
assigned-clocks = <&clk_mipi_dsi_combphy1>;
|
||
|
|
assigned-clock-parents = <&clk_pll_video0x4>;
|
||
|
|
};
|
||
|
|
/* clk_csi_top: csi_top { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "csi_top"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_csi_isp: csi_isp { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "csi_isp"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_csi_master0: csi_master0 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "csi_master0"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_csi_master1: csi_master1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "csi_master1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_pio: pio { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "pio"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ledc: ledc { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "ledc"; */
|
||
|
|
/* }; */
|
||
|
|
/* */
|
||
|
|
/* [>cpus space clocks from PRCM-SPEC<] */
|
||
|
|
/* clk_cpurcir: cpurcir { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurcir"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_losc_out: losc_out { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "losc_out"; */
|
||
|
|
/* }; */
|
||
|
|
/* [> clk below are read only , just to keep a clock tree <] */
|
||
|
|
/* clk_cpurcpus_pll: cpurcpus_pll { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurcpus_pll"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_cpurcpus: cpurcpus { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurcpus"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_cpurahbs: cpurahbs { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurahbs"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_cpurapbs1: cpurapbs1 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurapbs1"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_cpurapbs2_pll: cpurapbs2_pll { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurapbs2_pll"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_cpurapbs2: cpurapbs2 { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurapbs2"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_ppu: ppu { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "ppu"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_cpurpio: cpurpio { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "cpurpio"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_dcxo_out: dcxo_out { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "dcxo_out"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_suart: suart { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-cpus-clock"; */
|
||
|
|
/* clock-output-names = "suart"; */
|
||
|
|
/* }; */
|
||
|
|
/* clk_lradc: lradc { */
|
||
|
|
/* #clock-cells = <0>; */
|
||
|
|
/* compatible = "allwinner,periph-clock"; */
|
||
|
|
/* clock-output-names = "lradc"; */
|
||
|
|
/* }; */
|
||
|
|
};
|
||
|
|
};
|