478 lines
13 KiB
C
478 lines
13 KiB
C
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/*****************************************************************************
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* nand_base.c for SUNXI NAND .
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*
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* Copyright (C) 2016 Allwinner.
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*
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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*****************************************************************************/
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#include "nand_base.h"
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/*#include "../phy-nand/nand-partition2/nand_info_init_v2.h"*/
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#include "../phy-nand/nand_physic_interface.h"
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#include "../phy-nand/rawnand/controller/ndfc_base.h"
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#include "nand_osal_for_linux.h"
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#include "nand_panic.h"
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#include "nand_type.h"
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struct sunxi_ndfc aw_ndfc;
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struct nand_controller_info g_nctri_data[2] = {0};
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static unsigned int channel0;
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extern int nand_info_init(struct _nand_info *nand_info, int state);
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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******************************************************************************/
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static irqreturn_t nand_interrupt(int irq, void *channel)
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{
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unsigned int no;
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unsigned long iflags;
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spin_lock_irqsave(&aw_ndfc.nand_int_lock, iflags);
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no = *((unsigned int *)channel);
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do_nand_interrupt(no);
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spin_unlock_irqrestore(&aw_ndfc.nand_int_lock, iflags);
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return IRQ_HANDLED;
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}
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#if 0
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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******************************************************************************/
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static int nand_early_suspend(void)
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{
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struct _nftl_blk *nftl_blk;
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struct nand_blk_ops *tr = &mytr;
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nftl_blk = tr->nftl_blk_head.nftl_blk_next;
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nand_dbg_err("nand_early_suspend\n");
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while (nftl_blk != NULL) {
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nand_dbg_err("nand\n");
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mutex_lock(nftl_blk->blk_lock);
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nftl_blk->flush_write_cache(nftl_blk, 0xffff);
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mutex_unlock(nftl_blk->blk_lock);
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nftl_blk = nftl_blk->nftl_blk_next;
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}
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return 0;
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}
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static int nand_early_resume(void)
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{
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nand_dbg_err("nand_early_resume\n");
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return 0;
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}
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#endif
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static int nand_suspend(struct platform_device *plat_dev, pm_message_t state)
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{
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#if 0
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if (standby_type == NORMAL_STANDBY) {
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nand_dbg_err("[NAND] nand_suspend normal\n");
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NandHwNormalStandby();
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} else if (standby_type == SUPER_STANDBY) {
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nand_dbg_err("[NAND] nand_suspend super\n");
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nand_hw_super_standby();
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}
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nand_dbg_err("[NAND] nand_suspend ok\n");
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#else
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nand_dbg_err("[NAND] nand_suspend\n");
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nand_hw_super_standby();
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nand_dbg_err("[NAND] nand_suspend ok\n");
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#endif
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return 0;
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}
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static int nand_resume(struct platform_device *plat_dev)
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{
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#if 0
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if (standby_type == NORMAL_STANDBY) {
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nand_dbg_err("[NAND] nand_resume normal\n");
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NandHwNormalResume();
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} else if (standby_type == SUPER_STANDBY) {
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nand_dbg_err("[NAND] nand_resume super\n");
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nand_hw_super_resume();
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}
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nand_dbg_err("[NAND] nand_resume ok\n");
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#else
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nand_dbg_err("[NAND] nand_resume\n");
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nand_hw_super_resume();
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nand_dbg_err("[NAND] nand_resume ok\n");
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#endif
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return 0;
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}
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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u64 nand_dma_mask = DMA_BIT_MASK(64);
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static int nand_probe(struct platform_device *pdev)
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{
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__u32 irq;
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char *dev_name = "nand_dev";
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struct nand_controller_info *nctri0 = &g_nctri_data[0];
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struct nand_controller_info *nctri1 = &g_nctri_data[1];
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aw_ndfc.dev = &pdev->dev;
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pdev->dev.dma_mask = &nand_dma_mask;
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pdev->dev.coherent_dma_mask = DMA_BIT_MASK(64);
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aw_ndfc.p = pinctrl_get(aw_ndfc.dev);
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spin_lock_init(&aw_ndfc.nand_int_lock);
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if (get_storage_type() == NAND_STORAGE_TYPE_RAWNAND) {
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if ((nand_wait_rb_mode() != 0) || (nand_wait_dma_mode() != 0)) {
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nand_dbg_inf("nand interrupt request\n");
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irq = irq_of_parse_and_map(aw_ndfc.dev->of_node, 0);
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if (request_irq(irq, nand_interrupt, 0, dev_name, &channel0)) {
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nand_dbg_err("nand: allocating IRQ %d error\n", irq);
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return -EAGAIN;
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}
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}
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if (nand_get_max_channel_cnt() == 1) {
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nctri0->nreg_base = (void *)of_iomap(aw_ndfc.dev->of_node, 0);
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nand_dbg_inf("NDFC0_BASE_ADDR %p\n", nctri0->nreg_base);
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if (!nctri0->nreg_base) {
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nand_dbg_err("Failed to map NDFC0 IO space1\n");
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return -EAGAIN;
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}
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} else if (nand_get_max_channel_cnt() == 2) {
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nctri0->nreg_base = (void *)of_iomap(aw_ndfc.dev->of_node, 0);
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if (!nctri0->nreg_base) {
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nand_dbg_err("Failed to map NDFC0 IO space2\n");
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return -EAGAIN;
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}
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nctri1->nreg_base = (void *)of_iomap(aw_ndfc.dev->of_node, 1);
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if (!nctri1->nreg_base) {
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nand_dbg_err("Failed to map NDFC1 IO space3\n");
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return -EAGAIN;
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}
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}
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} else if (get_storage_type() == NAND_STORAGE_TYPE_SPINAND) {
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#if 0
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nand_dbg_inf("spinand interrupt request\n");
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irq = irq_of_parse_and_map(aw_ndfc.dev->of_node, 0);
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if (request_irq(irq, nand_interrupt, 0, dev_name, &channel0)) {
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nand_dbg_err("nand: allocating IRQ %d error\n", irq);
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return -EAGAIN;
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}
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SPIC0_IO_BASE = (void *)of_iomap(aw_ndfc.dev->of_node, 0);
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nand_dbg_err("SPIC0_BASE_ADDR %p\n", SPIC0_IO_BASE);
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if (!SPIC0_IO_BASE) {
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nand_dbg_err("Failed to map SPIC0 IO space1\n");
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return -EAGAIN;
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}
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init_completion(&spinand_dma_done);
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#endif
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}
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/*exit_probe_flag = 1;*/
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nand_dbg_inf("nand_probe\n");
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return 0;
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}
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static int nand_remove(struct platform_device *plat_dev)
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{
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nand_dbg_inf("nand_remove\n");
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return 0;
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}
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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uint32 shutdown_flush_write_cache(void)
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{
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struct _nftl_blk *nftl_blk;
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struct nand_blk_ops *tr = &mytr;
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nftl_blk = tr->nftl_blk_head.nftl_blk_next;
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while (nftl_blk != NULL) {
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nand_dbg_err("shutdown_flush_write_cache\n");
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mutex_lock(nftl_blk->blk_lock);
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nftl_blk->flush_write_cache(nftl_blk, 0xffff);
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print_nftl_zone(nftl_blk->nftl_zone);
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nftl_blk = nftl_blk->nftl_blk_next;
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}
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return 0;
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}
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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void nand_shutdown(struct platform_device *plat_dev)
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{
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shutdown_flush_write_cache();
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nand_hw_shutdown();
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nand_dbg_err("[NAND]shutdown end\n");
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}
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static const struct of_device_id of_nand_id[] = {
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{ .compatible = "allwinner,sun50iw9-nand"},
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{ .compatible = "allwinner,sun50iw10-nand"},
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{ .compatible = "allwinner,sun50iw11-nand"},
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{ .compatible = "allwinner,sun8iw18-nand"},
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{/* sentinel */},
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};
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static struct platform_driver nand_driver = {
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.probe = nand_probe,
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.remove = nand_remove,
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.shutdown = nand_shutdown,
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.suspend = nand_suspend,
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.resume = nand_resume,
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.driver = {
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.name = "sw_nand",
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.owner = THIS_MODULE,
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.of_match_table = of_nand_id,
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},
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};
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static const struct of_device_id of_spinand_id = {
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.compatible = "allwinner,sunxi-spinand",
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};
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static struct platform_driver spinand_driver = {
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.probe = nand_probe,
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.remove = nand_remove,
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.shutdown = nand_shutdown,
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.suspend = nand_suspend,
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.resume = nand_resume,
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.driver = {
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.name = "sw_nand",
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.owner = THIS_MODULE,
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.of_match_table = &of_spinand_id,
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},
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};
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/****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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int __init nand_init(void)
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{
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int ret;
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int nand_cache_level = 0;
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int nand_capacity_level = 0;
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int nand_flush_cache_num = 8;
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int dragonboard_flag = 0;
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struct device_node *np = NULL;
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const char *sta;
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/*exit_probe_flag = 0;*/
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nand_type = NAND_STORAGE_TYPE_NULL;
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/*raw-nand*/
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np = of_find_node_by_type(NULL, "nand0");
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if (!np) {
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nand_dbg_err("get raw-nand node failed\n");
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/*spi-nand*/
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np = of_find_node_by_type(NULL, "spinand");
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if (!np) {
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nand_dbg_err("get spi-nand node failed\n");
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return 0;
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} else {
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ret = of_property_read_string(np, "status", &sta);
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if (ret)
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nand_dbg_err("get spiN stat fail,%d\n", -ret);
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if (!strcasecmp(sta, "okay"))
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nand_type = NAND_STORAGE_TYPE_SPINAND;
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}
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} else {
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ret = of_property_read_string(np, "status", &sta);
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if (ret)
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nand_dbg_err("get rawN stat fail,%d\n", -ret);
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if (!strcasecmp(sta, "okay"))
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nand_type = NAND_STORAGE_TYPE_RAWNAND;
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else if (!strcasecmp(sta, "disabled"))
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nand_type = NAND_STORAGE_TYPE_NULL;
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}
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if (get_storage_type() == NAND_STORAGE_TYPE_NULL) {
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nand_dbg_err("[NE] Not found valid nand node on dts\n");
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return -EINVAL;
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}
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ret = nand_support_panic();
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if (ret)
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|
nand_dbg_err("NOT support panic nand\n");
|
||
|
|
else
|
||
|
|
nand_dbg_err("support panic nand\n");
|
||
|
|
|
||
|
|
if (get_storage_type() == NAND_STORAGE_TYPE_RAWNAND)
|
||
|
|
ret = platform_driver_register(&nand_driver);
|
||
|
|
else if (get_storage_type() == NAND_STORAGE_TYPE_SPINAND)
|
||
|
|
ret = platform_driver_register(&spinand_driver);
|
||
|
|
|
||
|
|
if (ret != 0) {
|
||
|
|
nand_dbg_err("Failed to insmod nand!!!\n");
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = of_property_read_u32(aw_ndfc.dev->of_node, "nand0_cache_level",
|
||
|
|
&nand_cache_level);
|
||
|
|
if (ret) {
|
||
|
|
nand_dbg_err("Failed to get nand0_cache_level\n");
|
||
|
|
nand_cache_level = 0;
|
||
|
|
} else {
|
||
|
|
if (nand_cache_level == 0x55aaaa55) {
|
||
|
|
nand_dbg_inf("nand0_cache_level is no used\n");
|
||
|
|
nand_cache_level = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = of_property_read_u32(aw_ndfc.dev->of_node, "nand0_flush_cache_num",
|
||
|
|
&nand_flush_cache_num);
|
||
|
|
if (ret) {
|
||
|
|
nand_dbg_err("Failed to get nand_flush_cache_num\n");
|
||
|
|
nand_flush_cache_num = 8;
|
||
|
|
} else {
|
||
|
|
if (nand_flush_cache_num == 0x55aaaa55) {
|
||
|
|
nand_dbg_inf("nand_flush_cache_num is no used\n");
|
||
|
|
nand_flush_cache_num = 8;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = of_property_read_u32(aw_ndfc.dev->of_node, "nand0_capacity_level",
|
||
|
|
&nand_capacity_level);
|
||
|
|
if (ret) {
|
||
|
|
nand_dbg_err("Failed to get nand_capacity_level\n");
|
||
|
|
nand_capacity_level = 0;
|
||
|
|
} else {
|
||
|
|
if (nand_capacity_level == 0x55aaaa55) {
|
||
|
|
nand_dbg_inf("nand_capacity_level is no used\n");
|
||
|
|
nand_capacity_level = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
dragonboard_flag = nand_get_dragon_board_flag(&aw_ndfc);
|
||
|
|
|
||
|
|
if (dragonboard_flag == 0) {
|
||
|
|
nand_dbg_err("nand init start\n");
|
||
|
|
|
||
|
|
p_nand_info = nand_hw_init();
|
||
|
|
if (p_nand_info == NULL) {
|
||
|
|
return -EAGAIN;
|
||
|
|
}
|
||
|
|
|
||
|
|
set_cache_level(p_nand_info, nand_cache_level);
|
||
|
|
set_capacity_level(p_nand_info, nand_capacity_level);
|
||
|
|
/*ret = nand_info_init(p_nand_info, 0, 8, NULL);*/
|
||
|
|
ret = nand_info_init(p_nand_info, 0);
|
||
|
|
if (ret != 0) {
|
||
|
|
nand_dbg_err("nand_info_init error\n");
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
init_blklayer();
|
||
|
|
|
||
|
|
} else {
|
||
|
|
nand_dbg_err("dragonboard_flag=%d,run nand test for dragonboard\n",
|
||
|
|
dragonboard_flag);
|
||
|
|
init_blklayer_for_dragonboard();
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
kthread_run(nand_thread, &mytr, "%sd", "nand_rc");
|
||
|
|
|
||
|
|
nand_panic_init(mytr.nftl_blk_head.nftl_blk_next);
|
||
|
|
nand_dbg_err("nand init end\n");
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/****************************************************************************
|
||
|
|
*Name :
|
||
|
|
*Description :
|
||
|
|
*Parameter :
|
||
|
|
*Return :
|
||
|
|
*Note :
|
||
|
|
*****************************************************************************/
|
||
|
|
void __exit nand_exit(void)
|
||
|
|
{
|
||
|
|
exit_blklayer();
|
||
|
|
|
||
|
|
if (get_storage_type() == NAND_STORAGE_TYPE_RAWNAND)
|
||
|
|
platform_driver_unregister(&nand_driver);
|
||
|
|
else if (get_storage_type() == NAND_STORAGE_TYPE_SPINAND)
|
||
|
|
platform_driver_unregister(&spinand_driver);
|
||
|
|
}
|
||
|
|
|
||
|
|
MODULE_LICENSE("GPL");
|
||
|
|
MODULE_AUTHOR("nand flash groups");
|
||
|
|
MODULE_DESCRIPTION("Generic NAND flash driver code");
|