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sync(system): update front board system configuration.

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This commit is contained in:
kangjun
2024-05-14 11:30:40 +08:00
parent 643879bc1e
commit 47b4c1d7b2
57 changed files with 19610 additions and 3891 deletions
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32
lichee/brandy-2.0/spl/board/sun8iw21p1/commonfastboot_sl100_front.mk Executable file
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@@ -0,0 +1,32 @@
#
#config file for sun8iw21
#
SUPPORT_BOARD=qg3101 r853s v851 v853 v853s r853
ARCH = arm
PLATFORM = sun8iw21p1
CFG_BOOT0_RUN_ADDR=0x20000
CFG_SYS_INIT_RAM_SIZE=0x10000
CFG_FES1_RUN_ADDR=0x28000
CFG_SBOOT_RUN_ADDR=0x20480
CFG_SUNXI_GPIO_V2=y
#CFG_SUNXI_FDT=y
#LOGO
CFG_BOOT0_LOGO_TO_KERNEL=y
#ISP
CFG_BOOT0_WIRTE_RTC_TO_ISP=y
CFG_ISPFLAG_RTC_INDEX=0x1
CFG_ISPFLAG_RTC_VALUE=0x1
CFG_SUNXI_EFUSE =y
#E907
CFG_RISCV_E907=y
CFG_SUNXI_ELF=y
CFG_MELISELF_LOAD_ADDR=0x43080000
#E907 interrupt table info update
#CFG_UPDATA_IRQ_TAB=y

63
lichee/brandy-2.0/spl/board/sun8iw21p1/spinorfastboot_sl100_front.mk Executable file
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@@ -0,0 +1,63 @@
#
#config file for sun8iw21 fastboot
#
#stroage
FILE_EXIST=$(shell if [ -f $(TOPDIR)/board/$(PLATFORM)/common.mk ]; then echo yes; else echo no; fi;)
EXT_FILE_EXIST=$(shell if [ -f $(TOPDIR)/board/$(PLATFORM)/common$(LICHEE_BOARD).mk ]; then echo yes; else echo no; fi;)
ifeq (x$(EXT_FILE_EXIST),xyes)
include $(TOPDIR)/board/$(PLATFORM)/common$(LICHEE_BOARD).mk
else ifeq (x$(FILE_EXIST),xyes)
include $(TOPDIR)/board/$(PLATFORM)/common.mk
else
include $(TOPDIR)/board/$(CP_BOARD)/common.mk
endif
MODULE=spinorfastboot
CFG_SUNXI_SPINOR =y
CFG_SUNXI_SPI =y
CFG_SUNXI_SPIF =y
CFG_SUNXI_DMA =y
CFG_SPI_USE_DMA =y
CFG_SPINOR_UBOOT_OFFSET=128
#CFG_SUNXI_FDT=y
CFG_BOOT0_LOAD_KERNEL=y
CFG_KERNEL_BOOTIMAGE=y
CFG_KERNEL_CHECKSUM=n #y will check kernel checksum in bimage, but slower
CFG_KERNEL_LOAD_ADDR=0x40007800
CFG_SUNXI_FDT_ADDR=0x41d00000
#CFG_LOAD_DTB_FROM_KERNEL=y
CFG_SUNXI_NO_UPDATE_FDT_CHOSEN=y
#CFG_SUNXI_SUPPORT_RAMDISK=y
#CFG_RAMDISK_ADDR=0x43000000
CFG_SUNXI_GPT=y
CFG_SPINOR_GPT_ARD=4064 # 0 or 40960 sector
CFG_SUNXI_ENV=y
CFG_SUNXI_ENV_SIZE=0x1000 # linux should be the same with LICHEE_REDUNDANT_ENV_SIZE.
CFG_SUNXI_HAVE_REDUNDENV=y
#IR STATE
CFG_BOOT0_WRITE_IRSATTE_TO_ISP=y
CFG_SUNXI_PHY_KEY=y
CFG_GPADC_KEY=y
CFG_BOOT0_LOAD_FLASH=y
CFG_BOOT0_LOAD_ISPPARM=y
CFG_ISPPARAM_LOAD_ADDR=0x43BFE000
CFG_ISPPARAM_SIZE=0x10 #unit:sector
CFG_SPINOR_ISPPARAM_OFFSET=CFG_SPINOR_UBOOT_OFFSET - CFG_ISPPARAM_SIZE - 0x8
CFG_SET_GPIO_NEW=y
#ISP
CFG_BOOT0_WIRTE_RTC_TO_ISP=y
CFG_ISPFLAG_RTC_INDEX=0x1
CFG_ISPFLAG_RTC_VALUE=0x1
CFG_SUNXI_EFUSE =y
CFG_MELISELF_LOAD_ADDR=0x43080000

3476
lichee/linux-4.9/arch/arm/configs/sun8iw21p1smp_defconfig
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File diff suppressed because it is too large Load Diff

6
lichee/linux-4.9/drivers/media/platform/sunxi-vin/modules/sensor/gc2083_mipi.c
View File

@@ -1046,11 +1046,11 @@ static int sensor_power(struct v4l2_subdev *sd, int on)
usleep_range(1000, 1200);
vin_gpio_set_status(sd, PWDN, 1);
vin_gpio_set_status(sd, RESET, 1);
//vin_gpio_set_status(sd, POWER_EN, 1);
vin_gpio_set_status(sd, POWER_EN, 1);
vin_gpio_write(sd, PWDN, CSI_GPIO_LOW);
vin_gpio_write(sd, RESET, CSI_GPIO_LOW);
usleep_range(1000, 1200);
//vin_gpio_write(sd, POWER_EN, CSI_GPIO_HIGH);
vin_gpio_write(sd, POWER_EN, CSI_GPIO_LOW);
//vin_set_pmu_channel(sd, CMBCSI, ON);
vin_set_pmu_channel(sd, IOVDD, ON);
usleep_range(1000, 1200);
@@ -1069,7 +1069,7 @@ static int sensor_power(struct v4l2_subdev *sd, int on)
sensor_dbg("PWR_OFF!do nothing\n");
cci_lock(sd);
vin_set_mclk(sd, OFF);
//vin_gpio_write(sd, POWER_EN, CSI_GPIO_LOW);
vin_gpio_write(sd, POWER_EN, CSI_GPIO_HIGH);
//vin_set_pmu_channel(sd, CMBCSI, OFF);
vin_set_pmu_channel(sd, AVDD, OFF);
vin_set_pmu_channel(sd, DVDD, OFF);

127
lichee/linux-4.9/drivers/media/platform/sunxi-vin/modules/sensor/ov02b10_mipi.c
View File

@@ -27,6 +27,8 @@ MODULE_LICENSE("GPL");
#define MCLK (24*1000*1000)
#define V4L2_IDENT_SENSOR (0x002B)
#define HC_ORIGIN_DEFINED_BOARD
/*
* Our nominal (default) frame rate.
*/
@@ -44,7 +46,7 @@ MODULE_LICENSE("GPL");
#define SENSOR_NAME_2 "ov02b10_mipi"
#define SENSOR_1600x1200_30FPS 1
#define SENSOR_1280x720_30FPS 1
#define SENSOR_1280x720_30FPS 0
#define SENSOR_1280x720_15FPS 0
#define SENSOR_800x600_15FPS 0
#define SENSOR_640x480_15FPS 0
@@ -664,6 +666,7 @@ static struct regval_list sensor_1600x1200_30fps_regs[] = {
{0xfd, 0x01},
{0x0e, 0x02},
{0x0f, 0x1a},
{0x12, 0x01}, //mirror and flip
{0x18, 0x00},
{0x22, 0xff},
{0x23, 0x02},
@@ -842,6 +845,77 @@ static int sensor_s_exp_gain(struct v4l2_subdev *sd,
return 0;
}
static data_type sensor_flip_status;
static int sensor_s_vflip(struct v4l2_subdev *sd, int enable)
{
data_type get_value;
data_type set_value;
if (!(enable == 0 || enable == 1))
return -1;
sensor_read(sd, 0x12, &get_value);
sensor_dbg("ready to vflip, regs_data = 0x%x\n", get_value);
if (enable) {
set_value = get_value | 0x02;
} else {
set_value = get_value & 0xFD;
}
sensor_write(sd, 0x12, set_value);
sensor_flip_status = set_value;
//usleep_range(80000, 100000);
//sensor_read(sd, 0x17, &get_value);
//sensor_dbg("after vflip, regs_data = 0x%x, sensor_flip_status = %d\n",
// get_value, sensor_flip_status);
return 0;
}
static int sensor_s_hflip(struct v4l2_subdev *sd, int enable)
{
data_type get_value;
data_type set_value;
if (!(enable == 0 || enable == 1))
return -1;
sensor_read(sd, 0x12, &get_value);
sensor_dbg("ready to hflip, regs_data = 0x%x\n", get_value);
if (enable) {
set_value = get_value | 0x01;
} else {
set_value = get_value & 0xFE;
}
sensor_write(sd, 0x12, set_value);
sensor_flip_status = set_value;
//usleep_range(80000, 100000);
//sensor_read(sd, 0x17, &get_value);
//sensor_dbg("after hflip, regs_data = 0x%x, sensor_flip_status = %d\n",
// get_value, sensor_flip_status);
return 0;
}
static int sensor_g_flip(struct v4l2_subdev *sd, struct sensor_flip *flip)
{
#ifdef CONFIG_ENABLE_SENSOR_FLIP_OPTION
if (sensor_flip_status & 0x01)
flip->hflip = 1;
else
flip->hflip = 0;
if (sensor_flip_status & 0x02)
flip->vflip = 1;
else
flip->vflip = 0;
#else
flip->hflip = 0;
flip->vflip = 0;
#endif
return 0;
}
static void sensor_s_sw_stby(struct v4l2_subdev *sd, int on_off)
{
@@ -851,6 +925,9 @@ static void sensor_s_sw_stby(struct v4l2_subdev *sd, int on_off)
/*
* Stuff that knows about the sensor.
*/
#ifdef HC_ORIGIN_DEFINED_BOARD
static int pwdn_flag = 0;
#endif
static int sensor_power(struct v4l2_subdev *sd, int on)
{
static int use_count = 0;
@@ -876,19 +953,21 @@ static int sensor_power(struct v4l2_subdev *sd, int on)
sensor_print("%d, PWR_ON! use_count:%d\n", __LINE__, use_count);
cci_lock(sd);
if(use_count == 0) {
vin_gpio_set_status(sd, SM_HS, 1);
vin_gpio_set_status(sd, SM_VS, 1);
vin_gpio_write(sd, SM_VS, CSI_GPIO_HIGH); //AVDD_EN
vin_gpio_write(sd, SM_HS, CSI_GPIO_HIGH); //DOVDD_EN
vin_gpio_set_status(sd, POWER_EN, 1);
vin_gpio_write(sd, POWER_EN, CSI_GPIO_HIGH); //AVDD&DOVDD
}
use_count++;
vin_gpio_set_status(sd, PWDN, 1);
vin_gpio_set_status(sd, RESET, 1);
vin_gpio_set_status(sd, POWER_EN, 1);
#ifdef HC_ORIGIN_DEFINED_BOARD
if (pwdn_flag == 0)
{
vin_gpio_set_status(sd, PWDN, 1);
pwdn_flag = 1;
}
#else
vin_gpio_set_status(sd, PWDN, 1);
vin_gpio_write(sd, PWDN, CSI_GPIO_LOW);
#endif
vin_gpio_write(sd, RESET, CSI_GPIO_LOW);
vin_gpio_write(sd, POWER_EN, CSI_GPIO_HIGH);
usleep_range(5000, 6000);
vin_set_mclk_freq(sd, MCLK);
@@ -910,7 +989,10 @@ static int sensor_power(struct v4l2_subdev *sd, int on)
vin_gpio_write(sd, RESET, CSI_GPIO_LOW);
vin_set_mclk(sd, OFF);
#ifdef HC_ORIGIN_DEFINED_BOARD
#else
vin_gpio_write(sd, PWDN, CSI_GPIO_LOW);
#endif
use_count--;
sensor_print("%d, PWR_OFF! use_count:%d\n", __LINE__, use_count);
cci_unlock(sd);
@@ -944,6 +1026,7 @@ static int sensor_reset(struct v4l2_subdev *sd, u32 val)
static int sensor_detect(struct v4l2_subdev *sd)
{
#if !defined CONFIG_VIN_INIT_MELIS
data_type rdval;
unsigned int sensor_id;
struct i2c_client *client = v4l2_get_subdevdata(sd);
@@ -959,6 +1042,7 @@ static int sensor_detect(struct v4l2_subdev *sd)
return -ENODEV;
}
#endif
return 0;
}
@@ -1020,8 +1104,9 @@ static int sensor_get_fmt_mbus_core(struct v4l2_subdev *sd, int *code)
// default:
// *code = info->fmt->mbus_code;
// }
*code = MEDIA_BUS_FMT_SRGGB10_1X10;//MEDIA_BUS_FMT_SBGGR10_1X10;
// *code = MEDIA_BUS_FMT_SRGGB10_1X10;//MEDIA_BUS_FMT_SBGGR10_1X10;
*code = MEDIA_BUS_FMT_SBGGR10_1X10;
sensor_print("%s(), L:%d, MEDIA_BUS_FMT_SBGGR10_1X10\n", __func__, __LINE__);
return 0;
}
@@ -1057,6 +1142,9 @@ static long sensor_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
case VIDIOC_VIN_SET_IR:
sensor_set_ir(sd, (struct ir_switch *)arg);
break;
case VIDIOC_VIN_SENSOR_GET_FLIP:
sensor_g_flip(sd, (struct sensor_flip *)arg);
break;
case VIDIOC_S_INPUT:
break;
default:
@@ -1071,7 +1159,8 @@ static long sensor_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
static struct sensor_format_struct sensor_formats[] = {
{
.desc = "Raw RGB Bayer",
.mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,
//.mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,
.mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,
.regs = sensor_fmt_raw,
.regs_size = ARRAY_SIZE(sensor_fmt_raw),
.bpp = 1
@@ -1304,6 +1393,10 @@ static int sensor_s_ctrl(struct v4l2_ctrl *ctrl)
return sensor_s_gain(sd, ctrl->val);
case V4L2_CID_EXPOSURE:
return sensor_s_exp(sd, ctrl->val);
case V4L2_CID_HFLIP:
return sensor_s_hflip(sd, ctrl->val);
case V4L2_CID_VFLIP:
return sensor_s_vflip(sd, ctrl->val);
}
return -EINVAL;
}
@@ -1435,11 +1528,11 @@ static int sensor_probe(struct i2c_client *client,
info->exp = 0;
info->gain = 0;
info->preview_first_flag = 1;
info->wdr_time_hs = 0x18; //zcy md 0x18 to 0x12
info->time_hs = 0x20; //zcy md 0x20 to 0x16
info->wdr_time_hs = 0x28; //zcy md 0x18 to 0x12
info->time_hs = 0x28; //zcy md 0x20 to 0x16
info->deskew = 0x2;
info->first_power_flag = 1;
info->ir_state = IDLE_STATE;
// info->ir_state = IDLE_STATE;
return 0;
}

481
lichee/melis-v3.0/source/projects/v851s3-e907-sl100-front-board/configs/defconfig Executable file
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@@ -0,0 +1,481 @@
#
# Automatically generated file; DO NOT EDIT.
# Melis3.x SDK Configuration
#
#
# Kernel Setup
#
#
# ARCH Support
#
CONFIG_RISCV=y
#
# RISC-V ARCH Setup
#
CONFIG_SUPPORT_FP_KERNEL=y
CONFIG_RV32=y
CONFIG_RV_MACHINE_MODE=y
CONFIG_RV_CLINT=y
# CONFIG_CPU_DCACHE_DISABLE is not set
CONFIG_ARCH_RISCV_FPU=y
# CONFIG_FPU_FLOAT is not set
CONFIG_FPU_DOUBLE=y
#
# Sunxi Platform Support
#
# CONFIG_CPUFREQ_SUPPORT is not set
CONFIG_PANIC_CLI=y
CONFIG_PANIC_CLI_PWD=y
#
# RTOS Kernel Setup
#
CONFIG_RTTKERNEL=y
#
# RT-Thread Kernel Setup
#
CONFIG_RT_NAME_MAX=32
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_SMP is not set
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=8
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_PIPE is not set
# CONFIG_RT_USING_RINGBUFFER is not set
CONFIG_RT_USING_WAITQUEUE=y
CONFIG_RT_USING_WORKQUEUE=y
# CONFIG_RT_USING_COMPLETION is not set
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_DEVICE_OPS=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
CONFIG_RT_VER_NUM=0x30104
CONFIG_RT_USING_TASK_PERF_MONITOR=y
# CONFIG_RT_SUPPORT_OPENOCD is not set
# CONFIG_RT_JLINK_RTT is not set
# CONFIG_SLAB_DEBUG is not set
CONFIG_CHECK_PREEMPT_LEVEL_IN_IPC=y
# CONFIG_AW_CHECK_MELIS_TASK_EXIT is not set
CONFIG_CONSISTENT_CONTEXT_SWITCH=y
CONFIG_NEST_INTERRUPT=y
CONFIG_HZ=1000
# CONFIG_KERNEL_SAMPLE_TEST is not set
#
# Drivers Setup
#
CONFIG_UART_BAUD_RATE=115200
#
# Melis Source Support
#
CONFIG_DRIVER_GPIO=y
# CONFIG_DRIVER_TWIBUS is not set
# CONFIG_DRIVER_SPIBUS is not set
# CONFIG_DRIVER_PWM is not set
CONFIG_DRIVER_SERIAL=y
# CONFIG_DRIVER_DMA is not set
CONFIG_DRIVER_CCMU=y
# CONFIG_DRIVER_NAND_FLASH is not set
#
# SoC HAL Drivers
#
#
# Common Option
#
CONFIG_DRIVER_SYSCONFIG=y
CONFIG_DMA_VMAREA_START_ADDRESS=0x80000000
# CONFIG_DMA_COHERENT_HEAP is not set
#
# CCMU Devices
#
CONFIG_DRIVERS_CCMU=y
CONFIG_DRIVERS_SUNXI_CLK=y
# CONFIG_HAL_TEST_CLK is not set
#
# UART Devices
#
CONFIG_DRIVERS_UART=y
# CONFIG_HAL_TEST_UART is not set
# CONFIG_SUNXI_UART_SUPPORT_POLL is not set
# CONFIG_SUNXI_UART_REGISTER_UART0 is not set
# CONFIG_SUNXI_UART_REGISTER_UART1 is not set
# CONFIG_SUNXI_UART_REGISTER_UART2 is not set
CONFIG_SUNXI_UART_REGISTER_UART3=y
CONFIG_CLI_UART_PORT=3
#
# GPIO Devices
#
CONFIG_DRIVERS_GPIO=y
# CONFIG_HAL_TEST_GPIO is not set
#
# DMA Devices
#
CONFIG_DRIVERS_DMA=y
# CONFIG_HAL_TEST_DMA is not set
#
# TWI Devices
#
CONFIG_DRIVERS_TWI=y
# CONFIG_HAL_TEST_TWI is not set
#
# SPI Devices
#
# CONFIG_DRIVERS_SPI is not set
#
# PWM Devices
#
# CONFIG_DRIVERS_PWM is not set
#
# GPADC Devices
#
# CONFIG_DRIVERS_GPADC is not set
#
# Message Box Devices
#
CONFIG_DRIVERS_MSGBOX=y
# CONFIG_DRIVERS_MSGBOX_SX is not set
CONFIG_DRIVERS_MSGBOX_AMP=y
# CONFIG_HAL_TEST_MSGBOX is not set
#
# VIN Devices
#
CONFIG_DRIVERS_VIN=y
# CONFIG_ENABLE_AIISP is not set
CONFIG_ISP_READ_THRESHOLD=y
# CONFIG_ISP_FAST_CONVERGENCE is not set
# CONFIG_ISP_ONLY_HARD_LIGHTADC is not set
# CONFIG_ISP_HARD_LIGHTADC is not set
CONFIG_ISP_NUMBER=2
#
# sensor driver select
#
# CONFIG_SENSOR_GC1054_MIPI is not set
# CONFIG_SENSOR_GC1084_MIPI is not set
# CONFIG_SENSOR_GC2053_MIPI is not set
# CONFIG_SENSOR_GC2083_MIPI is not set
# CONFIG_SENSOR_GC4663_MIPI is not set
# CONFIG_SENSOR_SC2355_MIPI is not set
# CONFIG_SENSOR_SC2336_MIPI is not set
# CONFIG_SENSOR_SC3336_MIPI is not set
# CONFIG_SENSOR_SC500AI_MIPI is not set
# CONFIG_SENSOR_SC5336_MIPI is not set
# CONFIG_SENSOR_TP9950_MIPI is not set
# CONFIG_SENSOR_TP9953_DVP is not set
# CONFIG_SENSOR_IMX319_MIPI is not set
# CONFIG_SENSOR_IMX335_MIPI is not set
# CONFIG_SENSOR_SC035HGS_MIPI is not set
# CONFIG_SENSOR_TP2815_MIPI is not set
# CONFIG_SENSOR_GC0406_MIPI is not set
# CONFIG_SENSOR_BF2253L_MIPI is not set
# CONFIG_SENSOR_N5_DVP is not set
# CONFIG_SENSOR_BF2257CS_MIPI is not set
# CONFIG_SENSOR_F355P_MIPI is not set
# CONFIG_SENSOR_F355P_DVP is not set
# CONFIG_SENSOR_F37P_DVP is not set
# CONFIG_SENSOR_F37P_MIPI is not set
CONFIG_SENSOR_OV02B10_MIPI=y
#
# Osal Setup
#
CONFIG_DRIVER_OSAL_CFG=y
CONFIG_SYSCONF_BUILDIN=y
#
# Drivers Test Sample
#
# CONFIG_SUNXI_PWM_TEST is not set
# CONFIG_SUNXI_GPIO_TEST is not set
# CONFIG_SUNXI_TWI_TEST is not set
# CONFIG_SUNXI_RTC_TEST is not set
# CONFIG_SUNXI_UART_TEST is not set
# CONFIG_SUNXI_STANDBY_TEST is not set
#
# Components Support
#
#
# Thirdparty Components Support
#
#
# RT-Thread DFS Support
#
# CONFIG_RT_USING_DFS is not set
#
# OpenAMP Support
#
CONFIG_SUPPORT_LIBMETAL=y
CONFIG_SUPPORT_AMP=y
CONFIG_AMP_SLAVE_MODE=y
CONFIG_MBOX_CHANNEL=0
CONFIG_MBOX_QUEUE_LENGTH=16
# CONFIG_RPMSG_DEMO is not set
CONFIG_RPMSG_NOTIFY=y
# CONFIG_RPMSG_SPEEDTEST is not set
CONFIG_AMP_SHARE_IRQ=y
CONFIG_RPMSG_CLIENT=y
# CONFIG_RPMSG_CLIENT_TEST is not set
CONFIG_RPMSG_CLIENT_QUEUE_SIZE=16
# CONFIG_RPMSG_CLIENT_DEBUG is not set
CONFIG_RPMSG_HEARBEAT=y
CONFIG_RPMSG_REMOTE_NAME="e907_rproc"
CONFIG_SLAVE_EARLY_BOOT=y
CONFIG_RPBUF_DEMO=y
# CONFIG_AMP_TRACE_SUPPORT is not set
# CONFIG_CXX is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=21
CONFIG_FINSH_THREAD_STACK_SIZE=16384
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
# Commands
#
CONFIG_COMMAND_FORK=y
# CONFIG_COMMAND_MEM_LAYOUT is not set
CONFIG_COMMAND_DATE=y
# CONFIG_COMMAND_EXIT is not set
# CONFIG_COMMAND_UPDATE is not set
# CONFIG_COMMAND_INSMOD is not set
# CONFIG_COMMAND_MEMTESTER is not set
# CONFIG_COMMAND_PQD is not set
# CONFIG_COMMAND_MMLK is not set
# CONFIG_COMMAND_HELLOWORLD is not set
# CONFIG_COMMAND_RTT_VERSION is not set
# CONFIG_COMMAND_WATCHDOG is not set
# CONFIG_COMMAND_MMC_READ is not set
# CONFIG_COMMAND_MMC_WRITE is not set
# CONFIG_COMMAND_PRODUCT is not set
CONFIG_COMMAND_BACKTRACE=y
# CONFIG_COMMAND_REBOOT is not set
CONFIG_COMMAND_PANIC=y
CONFIG_COMMAND_PRINT_MEM=y
CONFIG_COMMAND_WRITE_MEM=y
# CONFIG_COMMAND_LISTIRQ is not set
# CONFIG_COMMAND_SLABINFO is not set
# CONFIG_COMMAND_UNAME is not set
# CONFIG_COMMAND_CPUFREQ is not set
#
# Iobox Command
#
# CONFIG_IOBOX_TAIL is not set
# CONFIG_IOBOX_TOUCH is not set
# CONFIG_IOBOX_GREP is not set
# CONFIG_IOBOX_HEXDUMP is not set
# CONFIG_IOBOX_LS is not set
# CONFIG_IOBOX_RM is not set
# CONFIG_IOBOX_RWCHECK is not set
# CONFIG_IOBOX_RWSPEED is not set
# CONFIG_IOBOX_RSPEED is not set
# CONFIG_IOBOX_WSPEED is not set
# CONFIG_IOBOX_MOUNT is not set
#
# archival support
#
# CONFIG_SUBSYS_ARCHIVAL is not set
CONFIG_PTHREAD=y
# CONFIG_BENCHMARK is not set
# CONFIG_KERNEL_COMPRESS is not set
CONFIG_LIBC_MMAP=y
#
# Allwinner Components Support
#
# CONFIG_SUBSYS_KGDB is not set
#
# AW Multi-Console Compenents
#
CONFIG_SUBSYS_MULTI_CONSOLE=y
# CONFIG_MULTI_CONSOLE_DEBUG is not set
# CONFIG_MULTI_CONSOLE_REDIRECT_CMD is not set
CONFIG_MULTI_CONSOLE_RPMSG=y
#
# RPBuf framework
#
CONFIG_COMPONENTS_RPBUF=y
CONFIG_COMPONENTS_RPBUF_SERVICE_RPMSG=y
CONFIG_COMPONENTS_RPBUF_CONTROLLER=y
CONFIG_COMPONENTS_RPBUF_RPMSG_DEMO=y
CONFIG_VIRT_LOG=y
CONFIG_VIRT_LOG_SIZE=4
# CONFIG_SUBSYS_SAMPLES is not set
CONFIG_STANDBY=y
CONFIG_STANDBY_MSGBOX=y
#
# standby config
#
CONFIG_STANDBY_MSGBOX_CHANNEL=1
CONFIG_STANDBY_MSGBOX_IRQ=144
CONFIG_DEBUG_BACKTRACE=y
CONFIG_COMPONENTS_WAITQUEUE=y
#
# Libc library
#
CONFIG_LIBCNEWLIB=y
# CONFIG_LIBCNONE is not set
CONFIG_ARMCPU_HIGH_VECTOR_ADDRESS=y
CONFIG_IOREGS_VBASE=0xf0000000
CONFIG_SRAM_VBASE=0xf0000000
CONFIG_CLK_TUNING_VBASE=0xffff2000
CONFIG_ROOTFS_FATFS=y
# CONFIG_CHANGE_COMPRESS_METHOD is not set
# CONFIG_DOUBLE_FREE_CHECK is not set
# CONFIG_CMSIS is not set
#
# Environment Setup
#
# CONFIG_SDK_RELEASE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_MACROS is not set
# CONFIG_MODULES is not set
CONFIG_MODVERSIONS=y
# CONFIG_BOOT_LOGO_BMP is not set
# CONFIG_SHOW_FULL_VERSION is not set
CONFIG_CROSS_COMPILE="riscv64-unknown-elf-"
# CONFIG_INIT_CARD_PRODUCT is not set
CONFIG_LOG_DEFAULT_LEVEL=1
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
# CONFIG_LOG_RELEASE is not set
# CONFIG_BOOTUP_TURBO is not set
# CONFIG_DISABLE_ALL_DEBUGLOG is not set
# CONFIG_PRINT_TIMESTAMP is not set
CONFIG_DYNAMIC_LOG_LEVEL_SUPPORT=y
CONFIG_LOG_LEVEL_STORAGE_NONE=y
# CONFIG_LOG_LEVEL_STORAGE_RTC is not set
CONFIG_DYNAMIC_LOG_DEFAULT_LEVEL=2
# CONFIG_FRAME_POINTER is not set
CONFIG_FRAME_WARN=8192
CONFIG_UART_CLI_USE_NONE=y
# CONFIG_UART_CLI_USE_MUTEX is not set
# CONFIG_UART_CLI_USE_SPINLOCK is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_CC_OPTIMIZE_FOR_DEBUG=y
CONFIG_CC_OPTIMIZE_LEVEL=2
# CONFIG_ARM_UNWIND is not set
CONFIG_OS_MELIS=y
# CONFIG_KALLSYMS is not set
# CONFIG_MELIS_GENERATE_HEAD is not set
# CONFIG_DISABLE_ALL_UART_LOG is not set
#
# Toolchain Setup
#
CONFIG_TOOLCHAIN_MACH_FLAGS="-mcmodel=medany -mabi=ilp32d -march=rv32imafdcxthead"
CONFIG_TOOLCHAIN_LD_FLAGS="-melf32lriscv"
#
# Platform Setup
#
# CONFIG_SOC_SUN3IW2P2 is not set
# CONFIG_SOC_SUN3IW2P1 is not set
# CONFIG_SOC_SUN3IW1P1 is not set
# CONFIG_SOC_SUN8IW18P1 is not set
# CONFIG_SOC_SUN8IW19P1 is not set
# CONFIG_SOC_SUN20IW1P1 is not set
CONFIG_SOC_SUN20IW3P1=y
# CONFIG_SOC_SUN3I is not set
# CONFIG_SOC_SUN8I is not set
CONFIG_SOC_SUN20I=y
# CONFIG_ARCH_SUN8IW19 is not set
CONFIG_SOC_SUN20IW3=y
CONFIG_ARCH_SUN20IW3=y
CONFIG_DRAM_PHYBASE=0x43c00000
CONFIG_DRAM_VIRTBASE=0x43c00000
CONFIG_DRAM_SIZE=0x0400000
CONFIG_COHERENT_SIZE=0x00c00000
CONFIG_COHERENT_START_ADDR=0xa0000000
CONFIG_LOAD_DATA_TO_MEM_FROM_STORAGE=y

58
lichee/melis-v3.0/source/projects/v851s3-e907-sl100-front-board/configs/sys_config.fex Executable file
View File

@@ -0,0 +1,58 @@
;---------------------------------------------------------------------------------------------------------
; 说明： 脚本中的字符串区分大小写，用户可以修改"="后面的数值，但是不要修改前面的字符串
; 描述gpio的形式：Port:端口+组内序号<功能分配><内部电阻状态><驱动能力><输出电平状态>
;---------------------------------------------------------------------------------------------------------
;----------------------------------------------------------------------------------
;i2c configuration
;----------------------------------------------------------------------------------
[twi0]
twi0_scl = port:PE04<8><1><default><default>
twi0_sda = port:PE05<8><1><default><default>
[twi1]
twi1_scl = port:PE02<8><1><default><default>
twi1_sda = port:PE03<8><1><default><default>
;[twi2]
;twi2_scl = port:PH05<4><1><default><default>
;twi2_sda = port:PH06<4><1><default><default>
;[twi3]
;twi3_scl = port:PI03<4><1><default><default>
;twi3_sda = port:PI04<4><1><default><default>
;[twi4]
;twi4_scl = port:PI01<4><1><default><default>
;twi4_sda = port:PI02<4><1><default><default>
;----------------------------------------------------------------------------------
;uart configuration
;----------------------------------------------------------------------------------
;[uart0]
;uart_tx = port:PB08<5><1><default><default>
;uart_rx = port:PB09<5><1><default><default>
;[uart1]
;uart_tx = port:PB10<5><1><default><default>
;uart_rx = port:PB11<5><1><default><default>
;[uart2]
;uart_tx = port:PH05<5><1><default><default>
;uart_rx = port:PH06<5><1><default><default>
[uart3]
uart_tx = port:PE00<7><1><default><default>
uart_rx = port:PE01<7><1><default><default>
[sensor0]
used0 = 1
reset0 = port:PD20<1><1><default><default>
pwdn0 = port:PE10<1><1><default><default>
mclk0 = port:PE12<5><1><default><default>
[sensor1]
used1 = 1
reset1 = port:PD21<1><1><default><default>
pwdn1 = port:PE10<1><1><default><default>
mclk1 = port:PE13<5><1><default><default>

291
lichee/melis-v3.0/source/projects/v851s3-e907-sl100-front-board/kernel.lds Executable file
View File

@@ -0,0 +1,291 @@
/*
* The OUTPUT_ARCH command specifies the machine architecture where the
* argument is one of the names used in the T-HEAD library.
*/
OUTPUT_ARCH("riscv")
OUTPUT_FORMAT("elf32-littleriscv","elf64-littleriscv","elf32-littleriscv")
MEMORY
{
/*DRAM_KERNEL: 4M */
DRAM_SEG_KRN (rwx) : ORIGIN = 0x43c00000, LENGTH = 0x00400000
}
PHDRS
{
sbi PT_LOAD FLAGS(5); /* PF_R|PF_X */
boot PT_LOAD FLAGS(5); /* PF_R|PF_X */
text PT_LOAD FLAGS(5); /* PF_R|PF_X */
rodata PT_LOAD FLAGS(4); /* PF_R */
data PT_LOAD FLAGS(6); /* PF_R|PF_W */
note PT_NOTE FLAGS(4); /* PF_R */
debug PT_NOTE FLAGS(0); /* PF_R */
}
/* This area could be used for idle thead at last.*/
__STACKSIZE__ = 4096;
/* Get Kernel Running Address */
__DRAM_KRN_RUN_ADDRESS = ORIGIN(DRAM_SEG_KRN);
/* 0x9002 is insn "ebreak". */
ENTRY(_start)
SECTIONS
{
. = __DRAM_KRN_RUN_ADDRESS;
PROVIDE(_firmware_start = .);
.head.text __DRAM_KRN_RUN_ADDRESS : AT(__DRAM_KRN_RUN_ADDRESS)
{
. = ALIGN(8);
KEEP(*(.start))
. = ALIGN(8);
} > DRAM_SEG_KRN :boot =0x9002
.dram_seg.text ADDR(.head.text) + SIZEOF(.head.text) : AT(LOADADDR(.head.text) + SIZEOF(.head.text))
{
. = ALIGN(8);
PROVIDE(__code_start = ABSOLUTE(.));
*(.init)
*(.text)
*(.text.*)
*(.text*)
*(.stub)
*(.eh_frame_hdr)
*(.eh_frame_entry)
*(.gnu.warning)
*(.gnu.linkonce.t*)
*(.glue_7)
*(.glue_7t)
*(.gcc_except_table)
*(.jcr)
*(.fini)
*(.reuse)
KEEP(*(.eh_frame))
. = ALIGN(8);
PROVIDE(__code_end = ABSOLUTE(.));
} > DRAM_SEG_KRN :text =0x9002
PROVIDE(__readonly_area_start = .);
.dram_seg.rodata ADDR(.dram_seg.text) + SIZEOF(.dram_seg.text) : AT(LOADADDR(.dram_seg.text) + SIZEOF(.dram_seg.text))
{
. = ALIGN(8);
*(.rodata)
*(.rodata.*)
*(.rodata*)
*(.srodata)
*(.srodata.*)
*(.srodata*)
*(.gnu.linkonce.r*)
*(.rel.dyn*)
*(.flash)
KEEP(*.o(.openocd_support))
KEEP(*.o(.ramdisk))
KEEP(*.o(.dtbcfgs))
. = ALIGN(8);
} > DRAM_SEG_KRN :rodata =0x9002
.dram_seg.initcall ADDR(.dram_seg.rodata) + SIZEOF(.dram_seg.rodata) : AT(LOADADDR(.dram_seg.rodata) + SIZEOF(.dram_seg.rodata))
{
. = ALIGN(8);
__initcall_start = .;
KEEP(*(.initcallearly.init))
__initcall0_start = .;
KEEP(*(.initcall0.init))
KEEP(*(.initcall0s.init))
__initcall1_start = .;
KEEP(*(.initcall1.init))
KEEP(*(.initcall1s.init))
__initcall2_start = .;
KEEP(*(.initcall2.init))
KEEP(*(.initcall2s.init))
__initcall3_start = .;
KEEP(*(.initcall3.init))
KEEP(*(.initcall3s.init))
__initcall4_start = .;
KEEP(*(.initcall4.init))
KEEP(*(.initcall4s.init))
__initcall5_start = .;
KEEP(*(.initcall5.init))
KEEP(*(.initcall5s.init))
__initcallrootfs_start = .;
KEEP(*(.initcallrootfs.init))
KEEP(*(.initcallrootfss.init))
__initcall6_start = .;
KEEP(*(.initcall6.init))
KEEP(*(.initcall6s.init))
__initcall7_start = .;
KEEP(*(.initcall7.init))
KEEP(*(.initcall7s.init))
__initcall_end = .;
__con_initcall_start = .;
KEEP(*(.con_initcall.init))
__con_initcall_end = .;
. = ALIGN(8);
} > DRAM_SEG_KRN :rodata =0x9002
.note.gnu.build-id ADDR(.dram_seg.initcall) + SIZEOF(.dram_seg.initcall) : AT(LOADADDR(.dram_seg.initcall) + SIZEOF(.dram_seg.initcall))
{
. = ALIGN(8);
*(.note.gnu.build-id)
. = ALIGN(8);
} > DRAM_SEG_KRN :rodata =0x9002
.dram_seg.ctors ADDR(.note.gnu.build-id) + SIZEOF(.note.gnu.build-id) : AT(LOADADDR(.note.gnu.build-id) + SIZEOF(.note.gnu.build-id))
{
. = ALIGN(8);
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(SORT(.ctors)))
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE(__ctors_end__ = .);
. = ALIGN(0x8);
} > DRAM_SEG_KRN :rodata =0x9002
.dram_seg.dtors ADDR(.dram_seg.ctors) + SIZEOF(.dram_seg.ctors) : AT(LOADADDR(.dram_seg.ctors) + SIZEOF(.dram_seg.ctors))
{
. = ALIGN(8);
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(SORT(.dtors)))
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array))
PROVIDE(__dtors_end__ = .);
. = ALIGN(0x8);
} > DRAM_SEG_KRN :rodata =0x9002
PROVIDE(__readonly_area_end = .);
.dram_seg.data ADDR(.dram_seg.dtors) + SIZEOF(.dram_seg.dtors) : AT(LOADADDR(.dram_seg.dtors) + SIZEOF(.dram_seg.dtors))
{
. = ALIGN(8);
KEEP(*(*.vectors*))
*(.data)
*(.data.*)
*(.readmostly.data)
*(.data1)
*(.data1.*)
/*Best in the middle of data/sdata area.*/
PROVIDE( __global_pointer$ = . + 0x400);
__tdata_start = .;
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
*(.gnu.linkonce.d.*)
*(.sdata)
*(.sdata.*)
*(.sdata*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.got.plt)
*(.got)
. = ALIGN(8);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(8);
. = ALIGN(8);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(8);
} > DRAM_SEG_KRN :data =0x9002
.resource_table ADDR(.dram_seg.data) + SIZEOF(.dram_seg.data) : AT(LOADADDR(.dram_seg.data) + SIZEOF(.dram_seg.data))
{
KEEP(*(.resource_table))
} > DRAM_SEG_KRN :data
.share_irq_table ADDR(.resource_table) + SIZEOF(.resource_table) : AT(LOADADDR(.resource_table) + SIZEOF(.resource_table))
{
KEEP(*(.share_irq_table))
} > DRAM_SEG_KRN :data
/* stack for bringup process */
.dram_seg.stack ADDR(.share_irq_table) + SIZEOF(.share_irq_table) : AT(LOADADDR(.share_irq_table) + SIZEOF(.share_irq_table))
{
. = ALIGN(8);
__init_process_stack_start__ = .;
. += __STACKSIZE__;
__init_process_stack_end__ = .;
. = ALIGN(8);
} > DRAM_SEG_KRN :data
.dram_seg.bss ADDR(.dram_seg.stack) + SIZEOF(.dram_seg.stack) + SIZEOF(.dram_seg.stack) (NOLOAD) :
{
. = ALIGN(8);
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(.sbss)
*(.sbss.*)
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.scommon)
*(.dynbss)
*(COMMON)
. = ALIGN(8);
__tbss_start = .;
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
. = ALIGN(8);
__tbss_end = .;
} > DRAM_SEG_KRN :data
PROVIDE(__bss_start = ADDR(.dram_seg.bss));
PROVIDE(__bss_end = ABSOLUTE(.));
PROVIDE(_end = ABSOLUTE(.));
PROVIDE(_firmware_end = .);
.note 0 : { *(.note) } :note
.stab 0 : { *(.stab) } :note
.stabstr 0 : { *(.stabstr) } :note
.stab.excl 0 : { *(.stab.excl) } :note
.stab.exclstr 0 : { *(.stab.exclstr) } :note
.stab.index 0 : { *(.stab.index) } :note
.stab.indexstr 0 : { *(.stab.indexstr) } :note
.reginfo 0 : { *(.reginfo) } :note
.comment 0 : { *(.comment) } :note
.mdebug 0 : { *(.mdebug) } :note
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.riscv.attributes 0 : { KEEP (*(.riscv.attributes)) KEEP (*(.gnu.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}

5
lichee/melis-v3.0/source/projects/v851s3-e907-sl100-front-board/src/Makefile Executable file
View File

@@ -0,0 +1,5 @@
obj-y += main.o
ifeq ($(CONFIG_FF_TRACE),y)
subdir-ccflags-y += -finstrument-functions
endif

45
lichee/melis-v3.0/source/projects/v851s3-e907-sl100-front-board/src/main.c Executable file
View File

@@ -0,0 +1,45 @@
#include <stdio.h>
#include <hal_timer.h>
#include <openamp/sunxi_helper/openamp.h>
extern int csi_init(int argc, const char **argv);
extern int msh_exec(char *cmd, int length);
int app_entry(void *param)
{
#ifdef CONFIG_DRIVERS_VIN
int ret;
ret = csi_init(0, NULL);
if (ret) {
rpmsg_notify("rt-media", NULL, 0);
printf("csi init fail!\n");
}
#if 1
rpmsg_notify("twi0", NULL, 0);
rpmsg_notify("twi1", NULL, 0);
rpmsg_notify("tdm0", NULL, 0);
rpmsg_notify("isp0", NULL, 0);
rpmsg_notify("isp1", NULL, 0);
rpmsg_notify("scaler0", NULL, 0);
rpmsg_notify("scaler1", NULL, 0);
rpmsg_notify("scaler4", NULL, 0);
rpmsg_notify("scaler5", NULL, 0);
rpmsg_notify("scaler8", NULL, 0);
rpmsg_notify("scaler9", NULL, 0);
rpmsg_notify("scaler12", NULL, 0);
rpmsg_notify("vinc0", NULL, 0);
rpmsg_notify("vinc1", NULL, 0);
rpmsg_notify("vinc4", NULL, 0);
rpmsg_notify("vinc5", NULL, 0);
rpmsg_notify("vinc8", NULL, 0);
rpmsg_notify("vinc9", NULL, 0);
rpmsg_notify("vinc12", NULL, 0);
#endif
#else
hal_msleep(200);
rpmsg_notify("rt-media", NULL, 0);
#endif
//msh_exec("dmesg", strlen("dmesg"));
return 0;
}

10
lichee/melis-v3.0/source/projects/v851s3-e907-sl100-front-board/version/version_base.mk Executable file
View File

@@ -0,0 +1,10 @@
# define the verions of the image
# format: main
# such as 1, 2
# NOTICE: the range of main version is from 0 to 31,
# ROOT_ROLLBACK_USE ---0:not used,1:used
# when you change the version, you must increase main version, and never reduce the versions.
# the default version is 0
ROOT_ROLLBACK_USED = 1
MAIN_VERSION = 0

54
lichee/rtos-hal/hal/source/vin/modules/sensor/ov02b10_mipi.c
View File

@@ -40,7 +40,7 @@
#define SENSOR_NAME_2 "ov02b1b_mipi"
#define SENSOR_1600x1200_30FPS 1
#define SENSOR_1280x720_30FPS 1
#define SENSOR_1280x720_30FPS 0
#define SENSOR_1280x720_15FPS 0
#define SENSOR_800x600_15FPS 0
#define SENSOR_640x480_15FPS 0
@@ -193,6 +193,7 @@ static struct regval_list sensor_1600x1200_30fps_regs[] = {
{0xfd, 0x01},
{0x0e, 0x02},
{0x0f, 0x1a},
{0x12, 0x01}, //mirror and flip
{0x18, 0x00},
{0x22, 0xff},
{0x23, 0x02},
@@ -711,10 +712,9 @@ static int sensor_s_exp_gain(int id, struct sensor_exp_gain *exp_gain)
/*
* Stuff that knows about the sensor.
*/
static int pwdn_flag = 0;
static int sensor_power(int id, int on)
{
sensor_dbg("sensor_power \n");
if (on && (sensor_power_count[id])++ > 0)
return 0;
else if (!on && (sensor_power_count[id] == 0 || --(sensor_power_count[id]) > 0))
@@ -723,23 +723,19 @@ static int sensor_power(int id, int on)
switch (on) {
case PWR_ON:
sensor_dbg("PWR_ON!\n");
#if 1
//if((id==0 && sensor_power_count[1]==0) || (id==1 && sensor_power_count[0]==0)) {
hal_gpio_set_direction(GPIOD(2), GPIO_DIRECTION_OUTPUT);
hal_gpio_set_data(GPIOD(2), GPIO_DATA_HIGH);
hal_gpio_set_direction(GPIOF(3), GPIO_DIRECTION_OUTPUT);
hal_gpio_set_data(GPIOF(3), GPIO_DATA_HIGH);
hal_gpio_set_direction(GPIOF(4), GPIO_DIRECTION_OUTPUT);
hal_gpio_set_data(GPIOF(4), GPIO_DATA_HIGH);
// hal_gpio_set_direction(GPIOH(0), GPIO_DIRECTION_OUTPUT);
// hal_gpio_set_data(GPIOH(0), GPIO_DATA_LOW);
//}
#endif
if (pwdn_flag == 0)
{
pwdn_flag = 1;
vin_gpio_set_status(id, PWDN, 1);
}
vin_gpio_set_status(id, PWDN, 1);
// vin_gpio_set_status(id, PWDN, 1);
vin_gpio_set_status(id, RESET, 1);
vin_gpio_write(id, PWDN, CSI_GPIO_LOW);
vin_gpio_set_status(id, IR_LED, 1);
// vin_gpio_write(id, PWDN, CSI_GPIO_LOW);
vin_gpio_write(id, RESET, CSI_GPIO_LOW);
vin_gpio_write(id, IR_LED, CSI_GPIO_HIGH);
hal_usleep(5000);
vin_set_mclk_freq(id, MCLK);
@@ -757,13 +753,7 @@ static int sensor_power(int id, int on)
vin_gpio_write(id, RESET, CSI_GPIO_LOW);
vin_set_mclk(id, 0);
vin_gpio_write(id, PWDN, CSI_GPIO_LOW);
//if(sensor_power_count[0]==0 && sensor_power_count[1]==0) {
// hal_gpio_set_data(GPIOD(2), GPIO_DATA_LOW);
// hal_gpio_set_data(GPIOF(3), GPIO_DATA_LOW);
// hal_gpio_set_data(GPIOF(4), GPIO_DATA_LOW);
//}
// vin_gpio_write(id, PWDN, CSI_GPIO_LOW);
break;
default:
@@ -774,6 +764,7 @@ static int sensor_power(int id, int on)
static int sensor_set_ir(int id, int status)
{
#if 0
vin_gpio_set_status(id, IR_LED, 1);
switch (status) {
case IR_DAY:
@@ -785,6 +776,7 @@ static int sensor_set_ir(int id, int status)
default:
return -1;
}
#endif
return 0;
}
@@ -829,7 +821,8 @@ static struct sensor_format_struct sensor_formats[] = {
#if SENSOR_1600x1200_30FPS
/* 1600x1200 30fps */
{
.mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,
//.mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,
.mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,//MEDIA_BUS_FMT_SBGGR10_1X10,
.width = 1600,
.height = 1200,
.hoffset = 0,
@@ -936,7 +929,6 @@ static struct sensor_format_struct *sensor_get_format(int id, int isp_id)
int fps = isp_get_cfg[ispid].sensor_get_fps;
int i;
sensor_print("%s(), %d, id:%d, ispid:%d\n", __func__, __LINE__, id, ispid);
if (current_win[id])
return current_win[id];
@@ -949,11 +941,10 @@ static struct sensor_format_struct *sensor_get_format(int id, int isp_id)
}
}
}
sensor_print("%s(), %d, id:%d, ispid:%d\n", __func__, __LINE__, id, ispid);
if (sensor_format == NULL) {
for (i = 0; i < ARRAY_SIZE(sensor_formats); i++) {
sensor_print("%s(), %d, ispid:%d, width:%d\n", __func__, __LINE__, ispid, sensor_formats[i].width);
if (sensor_formats[i].wdr_mode == wdr_on && ((ispid == 0 && sensor_formats[i].width == 1280) || (ispid == 1 && sensor_formats[i].width == 1600))) {
if (sensor_formats[i].wdr_mode == wdr_on) {
sensor_format = &sensor_formats[i];
isp_get_cfg[ispid].sensor_get_fps = sensor_format->fps_fixed;
sensor_print("fine wdr is %d, use fps is %d\n", wdr_on, sensor_format->fps_fixed);
@@ -961,14 +952,14 @@ static struct sensor_format_struct *sensor_get_format(int id, int isp_id)
}
}
}
sensor_print("%s(), %d, id:%d, ispid:%d\n", __func__, __LINE__, id, ispid);
if (sensor_format == NULL) {
sensor_format = &sensor_formats[0];
isp_get_cfg[ispid].sensor_wdr_on = sensor_format->wdr_mode;
isp_get_cfg[ispid].sensor_get_fps = sensor_format->fps_fixed;
sensor_print("use wdr is %d, use fps is %d\n", sensor_format->wdr_mode, sensor_format->fps_fixed);
}
sensor_print("%s(), %d, id:%d, ispid:%d\n", __func__, __LINE__, id, ispid);
done:
current_win[id] = sensor_format;
return sensor_format;
@@ -1050,7 +1041,6 @@ static struct sensor_format_struct *sensor_get_switch_format(int id, int isp_id)
}
done:
sensor_wdr_mode[id] = sensor_format->wdr_mode;
current_switch_win[id] = sensor_format;
return sensor_format;
#else

1
lichee/rtos-hal/hal/source/vin/modules/sensor/sensor_register.c
View File

@@ -60,6 +60,7 @@ struct sensor_cfg_array sensor_array[] = {
#endif
#ifdef CONFIG_SENSOR_OV02B10_MIPI
{"ov02b10_mipi", &ov02b10_core},
{"ov02b1b_mipi", &ov02b10_core},
#endif
};

36
lichee/rtos-hal/hal/source/vin/platform/vin_config_sun8iw21p1.c
View File

@@ -54,7 +54,7 @@ unsigned int vin_vipp_irq[VIN_MAX_SCALER/DEV_VIRT_NUM] = {
struct vin_clk_info vind_default_clk[VIN_MAX_CLK] = {
[VIN_TOP_CLK] = {
.clock = HAL_CLK_PERIPH_CSI_TOP,
.frequency = 300000000,
.frequency = 340000000,
},
[VIN_TOP_CLK_SRC] = {
.clock = HAL_CLK_PLL_CSIX4,
@@ -418,7 +418,7 @@ struct vin_mclk_info vind_default_mclk[VIN_MAX_CCI] = {
struct sensor_list global_sensors[VIN_MAX_CSI] = {
/*mipi0 parser0*/
[0] = {
#ifdef CONFIG_SENSOR_BF2257CS_MIPI
#if defined(CONFIG_SENSOR_BF2257CS_MIPI)
.used = 1,
.sensor_name = "bf2257cs_mipi",
.sensor_twi_addr = 0x7C,
@@ -433,6 +433,21 @@ struct sensor_list global_sensors[VIN_MAX_CSI] = {
.ir_cut_gpio[0] = 0xffff,/*-cut*/
.ir_cut_gpio[1] = 0xffff,/*+cut*/
.ir_led_gpio = 0xffff,
#elif defined(CONFIG_SENSOR_OV02B10_MIPI)
.used = 1,
.sensor_name = "ov02b10_mipi",
.sensor_twi_addr = 0x78,
.sensor_twi_id = 1,
.mclk_id = 0,
.use_isp = 1,
.id = 0,
.addr_width = 8,
.data_width = 8,
.reset_gpio = GPIOE(7),
.pwdn_gpio = GPIOE(8),
.ir_cut_gpio[0] = 0xffff,/*-cut*/
.ir_cut_gpio[1] = 0xffff,/*+cut*/
.ir_led_gpio = GPIOF(3),
#else
.used = 1,
.sensor_name = "gc2053_mipi",
@@ -452,7 +467,7 @@ struct sensor_list global_sensors[VIN_MAX_CSI] = {
},
/*mipi1 parser1*/
[1] = {
#ifdef CONFIG_SENSOR_BF2257CS_MIPI
#if defined(CONFIG_SENSOR_BF2257CS_MIPI)
.used = 1,
.sensor_name = "bf2257cs_mipi_2",
.sensor_twi_addr = 0xdc,
@@ -467,6 +482,21 @@ struct sensor_list global_sensors[VIN_MAX_CSI] = {
.ir_cut_gpio[0] = 0xffff,/*-cut*/
.ir_cut_gpio[1] = 0xffff,/*+cut*/
.ir_led_gpio = 0xffff,
#elif defined(CONFIG_SENSOR_OV02B10_MIPI)
.used = 1,
.sensor_name = "ov02b1b_mipi",
.sensor_twi_addr = 0x78,
.sensor_twi_id = 0,
.mclk_id = 1,
.use_isp = 1,
.id = 1,
.addr_width = 8,
.data_width = 8,
.reset_gpio = GPIOE(9),
.pwdn_gpio = GPIOE(10),
.ir_cut_gpio[0] = 0xffff,/*-cut*/
.ir_cut_gpio[1] = 0xffff,/*+cut*/
.ir_led_gpio = 0xffff,
#else
.used = 1,
.sensor_name = "gc2053_mipi",

8603
lichee/rtos-hal/hal/source/vin/vin_isp/isp_server/isp_cfg/SENSOR_H/ov02b10_mipi_isp600_20240423_133842_ir.h Executable file
View File

File diff suppressed because it is too large Load Diff

8601
lichee/rtos-hal/hal/source/vin/vin_isp/isp_server/isp_cfg/SENSOR_H/ov02b10_mipi_isp600_20240423_135454_rgb.h Executable file
View File

File diff suppressed because it is too large Load Diff

20
lichee/rtos-hal/hal/source/vin/vin_isp/isp_server/isp_cfg/isp_ini_parse.c
View File

@@ -102,8 +102,8 @@
#endif // CONFIG_SENSOR_F355P_MIPI
#ifdef CONFIG_SENSOR_OV02B10_MIPI
#include "SENSOR_H/ov02b10_mipi_isp600_20221114b_color.h"
#include "SENSOR_H/ov02b10_mipi_isp600_20230811_104819_ir_v3.h"
#include "SENSOR_H/ov02b10_mipi_isp600_20240423_135454_rgb.h"
#include "SENSOR_H/ov02b10_mipi_isp600_20240423_133842_ir.h"
#endif // CONFIG_SENSOR_OV02B10_MIPI
#else
@@ -172,8 +172,10 @@ struct isp_cfg_array cfg_arr[] = {
#endif // CONFIG_SENSOR_F355P_MIPI
#ifdef CONFIG_SENSOR_OV02B10_MIPI
{"ov02b10_mipi", "ov02b10_mipi_isp600_20221114b_color", 1600, 1200, 30, 0, 0, &ov02b10_mipi_isp_cfg},
{"ov02b10_mipi", "ov02b10_mipi_isp600_20230811_104819_ir_v3", 1600, 1200, 30, 1, 0, &ov02b10_mipi_isp_ir_cfg},
{"ov02b1b_mipi", "ov02b10_mipi_isp600_20240423_135454_rgb", 1600, 1200, 30, 0, 0, &ov02b10_mipi_isp_cfg},
{"ov02b1b_mipi", "ov02b10_mipi_isp600_20240423_135454_rgb", 1600, 1200, 30, 1, 0, &ov02b10_mipi_isp_cfg},
{"ov02b10_mipi", "ov02b10_mipi_isp600_20240423_133842_ir", 1600, 1200, 30, 0, 0, &ov02b10_mipi_isp_ir_cfg},
{"ov02b10_mipi", "ov02b10_mipi_isp600_20240423_133842_ir", 1600, 1200, 30, 1, 0, &ov02b10_mipi_isp_ir_cfg},
#endif // CONFIG_SENSOR_OV02B10_MIPI
#ifdef CONFIG_SENSOR_GC1084_MIPI
@@ -198,10 +200,10 @@ int parser_ini_info(struct isp_param_config *param, char *isp_cfg_name, char *se
{
int i;
struct isp_cfg_pt *cfg = NULL;
ISP_WARN("%s(), L:%d, sensor_name:%s\n", __func__, __LINE__, sensor_name);
//load header parameter
for (i = 0; i < ARRAY_SIZE(cfg_arr); i++) {
if (!strncmp(sensor_name, cfg_arr[i].sensor_name, 6) &&
if (!strncmp(sensor_name, cfg_arr[i].sensor_name, 8) &&
(w == cfg_arr[i].width) && (h == cfg_arr[i].height) &&
(fps == cfg_arr[i].fps) && (wdr == cfg_arr[i].wdr) &&
(ir == cfg_arr[i].ir)) {
@@ -214,7 +216,7 @@ int parser_ini_info(struct isp_param_config *param, char *isp_cfg_name, char *se
if (i == ARRAY_SIZE(cfg_arr)) {
for (i = 0; i < ARRAY_SIZE(cfg_arr); i++) {
if (!strncmp(sensor_name, cfg_arr[i].sensor_name, 6) && (wdr == cfg_arr[i].wdr)) {
if (!strncmp(sensor_name, cfg_arr[i].sensor_name, 8) && (wdr == cfg_arr[i].wdr)) {
cfg = cfg_arr[i].cfg;
ISP_WARN("cannot find %s_%d_%d_%d_%d_%d isp config, use %s_%d_%d_%d_%d_%d -> [%s]\n", sensor_name, w, h, fps, wdr, ir,
cfg_arr[i].sensor_name, cfg_arr[i].width, cfg_arr[i].height, cfg_arr[i].fps, cfg_arr[i].wdr,
@@ -301,9 +303,9 @@ int parser_ini_regs_info(struct isp_lib_context *ctx, char *sensor_name,
{
int i;
struct isp_reg_pt *reg = NULL;
ISP_WARN("%s(), L:%d, sensor_name:%s\n", __func__, __LINE__, sensor_name);
for (i = 0; i < ARRAY_SIZE(reg_arr); i++) {
if (!strncmp(sensor_name, reg_arr[i].sensor_name, 6) &&
if (!strncmp(sensor_name, reg_arr[i].sensor_name, 8) &&
(w == reg_arr[i].width) && (h == reg_arr[i].height) &&// (fps == reg_arr[i].fps) &&
(wdr == reg_arr[i].wdr)) {