/*
* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
*
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* the the People's Republic of China and other countries.
* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
*
* DISCLAIMER
* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
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* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
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*
*
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*/

#ifndef __UART_SUN8IW21_H__
#define __UART_SUN8IW21_H__

#define SUNXI_CLK_UART0 HAL_CLK_PERIPH_UART0
#define SUNXI_RST_UART0 0

#define SUNXI_CLK_UART1 HAL_CLK_PERIPH_UART1
#define SUNXI_RST_UART1 0

#define SUNXI_CLK_UART2 HAL_CLK_PERIPH_UART2
#define SUNXI_RST_UART2 0

#define SUNXI_CLK_UART3 HAL_CLK_PERIPH_UART3
#define SUNXI_RST_UART3 0

#define SUNXI_CLK_UART4 0 /* no support */
#define SUNXI_RST_UART4 0

#define SUNXI_CLK_UART5 0 /* no support */
#define SUNXI_RST_UART5 0


#define SUNXI_IRQ_UART0		(18)  /* uart0 interrupt */
#define SUNXI_IRQ_UART1		(19)  /* uart1 interrupt */
#define SUNXI_IRQ_UART2		(20)  /* uart2 interrupt */
#define SUNXI_IRQ_UART3		(21)  /* uart3 interrupt */
#define SUNXI_IRQ_UART4		(0)  /* no support */
#define SUNXI_IRQ_UART5		(0)  /* no support */
/* base register infomation */
#define SUNXI_UART0_BASE	(0x02500000)
#define SUNXI_UART1_BASE	(0x02500400)
#define SUNXI_UART2_BASE	(0x02500800)
#define SUNXI_UART3_BASE	(0x02500c00)
#define SUNXI_UART4_BASE	(0xffffffff) /* no support */
#define SUNXI_UART5_BASE	(0xffffffff) /* no support */

#define UART_FIFO_SIZE		(128)
#define UART0_GPIO_FUNCTION	(5)
#define UART1_GPIO_FUNCTION	(5)
#define UART2_GPIO_FUNCTION	(5)
#define UART3_GPIO_FUNCTION	(5)
#define UART4_GPIO_FUNCTION	(5) /* no support */
#define UART5_GPIO_FUNCTION	(5) /* no support */

#define UART0_TX	GPIOB(8)
#define UART0_RX	GPIOB(9)

#define UART1_TX	GPIOB(10)
#define UART1_RX	GPIOB(11)

#define UART2_TX	GPIOH(5)
#define UART2_RX	GPIOH(6)

#define UART3_TX	GPIOH(0)
#define UART3_RX	GPIOH(1)

#define UART4_TX	GPIOH(0) /* no support */
#define UART4_RX	GPIOH(1) /* no support */

#define UART5_TX	GPIOH(0) /* no support */
#define UART5_RX	GPIOH(1) /* no support */

#endif /*__UART_SUN8IW21_H__  */