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*/
#include "soc.h"
#include <core_rv32.h>
#include <hal_interrupt.h>

#define CONFIG_CPU_E907FD 1

static int g_system_clock = IHS_VALUE;

extern void irq_vectors_init(void);
extern int __Vectors;
extern void dcache_enable(void);

int32_t drv_get_sys_freq(void)
{
    return g_system_clock;
}

static void _system_init_for_kernel(void)
{
    irq_vectors_init();

    csi_coret_config(drv_get_sys_freq() / CONFIG_HZ, CORET_IRQn);    //10ms
    hal_enable_irq(CORET_IRQn);
}

void SystemInit(void)
{
    int i;
    uint32_t mstatus = 0;

    /* enable mstatus FS */
#ifdef CONFIG_ARCH_RISCV_FPU
    mstatus = __get_MSTATUS();
    mstatus |= (1 << 13);
    __set_MSTATUS(mstatus);
#endif

    /* enable mxstatus THEADISAEE */
    uint32_t mxstatus = __get_MXSTATUS();
    mxstatus |= (1 << 22);
    /* enable mxstatus MM */
#ifdef CONFIG_ARCH_RISCV_FPU
    mxstatus |= (1 << 15);
#endif
    __set_MXSTATUS(mxstatus);

    /* get interrupt level from info */
    CLIC->CLICCFG = (((CLIC->CLICINFO & CLIC_INFO_CLICINTCTLBITS_Msk) >> CLIC_INFO_CLICINTCTLBITS_Pos) << CLIC_CLICCFG_NLBIT_Pos);

    for (i = 0; i < sizeof(CLIC->CLICINT)/sizeof(CLIC->CLICINT[0]); i++)
    {
        CLIC->CLICINT[i].IP = 0;
        CLIC->CLICINT[i].ATTR = 1; /* use vector interrupt */
    }

    /* tspend use positive interrupt */
    CLIC->CLICINT[Machine_Software_IRQn].ATTR = 0x3;

    hal_enable_irq(Machine_Software_IRQn);

    _system_init_for_kernel();
}

/* enable mexstatus SPUSHEN and SPSWAPEN */
#ifdef CONFIG_ARCH_RISCV_FPU
void context_mexstatus(void)
{

    unsigned int  mexstatus;
    mexstatus  = __get_MEXSTATUS();
    mexstatus |= (0x2 << 16);
    __set_MEXSTATUS(mexstatus);
}
#endif

#ifdef CONFIG_STANDBY
void clic_suspend(void)
{
	return;
}

void clic_resume(void)
{
	int i;
    uint32_t mstatus = 0;

    /* enable mstatus FS */
#ifdef CONFIG_ARCH_RISCV_FPU
    mstatus = __get_MSTATUS();
    mstatus |= (1 << 13);
    __set_MSTATUS(mstatus);
#endif

    /* enable mxstatus THEADISAEE */
    uint32_t mxstatus = __get_MXSTATUS();
    mxstatus |= (1 << 22);
    /* enable mxstatus MM */
#ifdef CONFIG_ARCH_RISCV_FPU
    mxstatus |= (1 << 15);
#endif
    __set_MXSTATUS(mxstatus);

    /* get interrupt level from info */
    CLIC->CLICCFG = (((CLIC->CLICINFO & CLIC_INFO_CLICINTCTLBITS_Msk) >> CLIC_INFO_CLICINTCTLBITS_Pos) << CLIC_CLICCFG_NLBIT_Pos);

    for (i = 0; i < sizeof(CLIC->CLICINT)/sizeof(CLIC->CLICINT[0]); i++)
    {
        CLIC->CLICINT[i].IP = 0;
        CLIC->CLICINT[i].ATTR = 1; /* use vector interrupt */
    }

    /* tspend use positive interrupt */
    CLIC->CLICINT[Machine_Software_IRQn].ATTR = 0x3;

    csi_coret_config(drv_get_sys_freq() / CONFIG_HZ, CORET_IRQn);
    hal_enable_irq(CORET_IRQn);

    dcache_enable();

}
#endif