194 lines
8.5 KiB
C
Executable File
194 lines
8.5 KiB
C
Executable File
/*
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* ===========================================================================================
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*
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* Filename: excep.h
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*
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* Description: contexts definition of irq, task switch and exception.
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*
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* Version: Melis3.0
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* Create: 2020-07-26 16:48:32
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* Revision: none
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* Compiler: GCC:version 7.2.1 20170904 (release),ARM/embedded-7-branch revision 255204
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*
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* Author: caozilong@allwinnertech.com
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* Organization: BU1-PSW
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* Last Modified: 2020-08-05 17:56:47
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*
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* ===========================================================================================
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*/
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#ifndef __EXPRISCV_INC__
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#define __EXPRISCV_INC__
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#ifndef __ASSEMBLY__
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#include <stdint.h>
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typedef struct
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{
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uint32_t f[32];
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uint32_t fcsr;
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} riscv_f_ext_state_t;
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typedef struct
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{
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uint64_t f[32];
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uint32_t fcsr;
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} riscv_d_ext_state_t;
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typedef struct
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{
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uint64_t f[64] __attribute__((aligned(16)));
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uint32_t fcsr;
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/*
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¦* Reserved for expansion of sigcontext structure. Currently zeroed
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¦* upon signal, and must be zero upon sigreturn.
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¦*/
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uint32_t reserved[3];
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} riscv_q_ext_state_t;
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typedef struct
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{
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#ifdef CONFIG_FPU_DOUBLE
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riscv_d_ext_state_t fpustatus;
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#else
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riscv_f_ext_state_t fpustatus;
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#endif
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} fpu_context_t;
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/* CPU-specific state of a task */
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typedef struct
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{
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/* Callee-saved registers */
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unsigned long ra;
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unsigned long sstatus; /* sr register the thread born */
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/*
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*array isa abi
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*s[ 0]: x8 s0/fp
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*s[ 1]: x9 s1
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*s[ 2]: x18 s2
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*s[ 3]: x19 s3
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*s[ 4]: x20 s4
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*s[ 5]: x21 s5
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*s[ 6]: x22 s6
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*s[ 7]: x23 s7
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*s[ 8]: x24 s8
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*s[ 9]: x25 s9
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*s[10]: x26 s10
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*s[11]: x27 s11
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*/
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unsigned long s[12]; /* s[0]: frame pointer */
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} __attribute__((packed)) switch_ctx_regs_t;
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// zero, x2(sp), x3(tp) need not backup.
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typedef struct
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{
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unsigned long epc; // 0 * __SIZEOF_LONG__
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unsigned long x1; // 1 * __SIZEOF_LONG__
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unsigned long x2; // 2 * __SIZEOF_LONG__
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unsigned long x3; // 3 * __SIZEOF_LONG__
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unsigned long x4; // 4 * __SIZEOF_LONG__
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unsigned long x5; // 5 * __SIZEOF_LONG__
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unsigned long x6; // 6 * __SIZEOF_LONG__
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unsigned long x7; // 7 * __SIZEOF_LONG__
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unsigned long x8; // 8 * __SIZEOF_LONG__
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unsigned long x9; // 9 * __SIZEOF_LONG__
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unsigned long x10; //10 * __SIZEOF_LONG__
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unsigned long x11; //11 * __SIZEOF_LONG__
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unsigned long x12; //12 * __SIZEOF_LONG__
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unsigned long x13; //13 * __SIZEOF_LONG__
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unsigned long x14; //14 * __SIZEOF_LONG__
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unsigned long x15; //15 * __SIZEOF_LONG__
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unsigned long x16; //16 * __SIZEOF_LONG__
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unsigned long x17; //17 * __SIZEOF_LONG__
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unsigned long x18; //18 * __SIZEOF_LONG__
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unsigned long x19; //19 * __SIZEOF_LONG__
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unsigned long x20; //20 * __SIZEOF_LONG__
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unsigned long x21; //21 * __SIZEOF_LONG__
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unsigned long x22; //22 * __SIZEOF_LONG__
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unsigned long x23; //23 * __SIZEOF_LONG__
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unsigned long x24; //24 * __SIZEOF_LONG__
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unsigned long x25; //25 * __SIZEOF_LONG__
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unsigned long x26; //26 * __SIZEOF_LONG__
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unsigned long x27; //27 * __SIZEOF_LONG__
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unsigned long x28; //28 * __SIZEOF_LONG__
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unsigned long x29; //29 * __SIZEOF_LONG__
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unsigned long x30; //30 * __SIZEOF_LONG__
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unsigned long x31; //31 * __SIZEOF_LONG__
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unsigned long status; //32 * __SIZEOF_LONG__
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unsigned long scratch; //33 * __SIZEOF_LONG__
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} irq_regs_t;
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#endif
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#ifdef CONFIG_FPU_DOUBLE
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#define FPU_CTX_F0_F0 0 /* offsetof(fpu_context_t, fpustatus.f[0]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F1_F0 8 /* offsetof(fpu_context_t, fpustatus.f[1]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F2_F0 16 /* offsetof(fpu_context_t, fpustatus.f[2]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F3_F0 24 /* offsetof(fpu_context_t, fpustatus.f[3]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F4_F0 32 /* offsetof(fpu_context_t, fpustatus.f[4]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F5_F0 40 /* offsetof(fpu_context_t, fpustatus.f[5]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F6_F0 48 /* offsetof(fpu_context_t, fpustatus.f[6]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F7_F0 56 /* offsetof(fpu_context_t, fpustatus.f[7]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F8_F0 64 /* offsetof(fpu_context_t, fpustatus.f[8]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F9_F0 72 /* offsetof(fpu_context_t, fpustatus.f[9]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F10_F0 80 /* offsetof(fpu_context_t, fpustatus.f[10]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F11_F0 88 /* offsetof(fpu_context_t, fpustatus.f[11]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F12_F0 96 /* offsetof(fpu_context_t, fpustatus.f[12]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F13_F0 104 /* offsetof(fpu_context_t, fpustatus.f[13]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F14_F0 112 /* offsetof(fpu_context_t, fpustatus.f[14]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F15_F0 120 /* offsetof(fpu_context_t, fpustatus.f[15]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F16_F0 128 /* offsetof(fpu_context_t, fpustatus.f[16]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F17_F0 136 /* offsetof(fpu_context_t, fpustatus.f[17]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F18_F0 144 /* offsetof(fpu_context_t, fpustatus.f[18]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F19_F0 152 /* offsetof(fpu_context_t, fpustatus.f[19]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F20_F0 160 /* offsetof(fpu_context_t, fpustatus.f[20]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F21_F0 168 /* offsetof(fpu_context_t, fpustatus.f[21]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F22_F0 176 /* offsetof(fpu_context_t, fpustatus.f[22]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F23_F0 184 /* offsetof(fpu_context_t, fpustatus.f[23]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F24_F0 192 /* offsetof(fpu_context_t, fpustatus.f[24]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F25_F0 200 /* offsetof(fpu_context_t, fpustatus.f[25]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F26_F0 208 /* offsetof(fpu_context_t, fpustatus.f[26]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F27_F0 216 /* offsetof(fpu_context_t, fpustatus.f[27]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F28_F0 224 /* offsetof(fpu_context_t, fpustatus.f[28]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F29_F0 232 /* offsetof(fpu_context_t, fpustatus.f[29]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F30_F0 240 /* offsetof(fpu_context_t, fpustatus.f[30]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F31_F0 248 /* offsetof(fpu_context_t, fpustatus.f[31]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_FCSR_F0 256 /* offsetof(fpu_context_t, fpustatus.fcsr) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#else
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#define FPU_CTX_F0_F0 0
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#define FPU_CTX_F1_F0 4
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#define FPU_CTX_F2_F0 8
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#define FPU_CTX_F3_F0 12
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#define FPU_CTX_F4_F0 16
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#define FPU_CTX_F5_F0 20
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#define FPU_CTX_F6_F0 24
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#define FPU_CTX_F7_F0 28
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#define FPU_CTX_F8_F0 32
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#define FPU_CTX_F9_F0 36
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#define FPU_CTX_F10_F0 40
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#define FPU_CTX_F11_F0 44
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#define FPU_CTX_F12_F0 48
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#define FPU_CTX_F13_F0 52
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#define FPU_CTX_F14_F0 56
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#define FPU_CTX_F15_F0 60
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#define FPU_CTX_F16_F0 64
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#define FPU_CTX_F17_F0 68
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#define FPU_CTX_F18_F0 72
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#define FPU_CTX_F19_F0 76
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#define FPU_CTX_F20_F0 80
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#define FPU_CTX_F21_F0 84
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#define FPU_CTX_F22_F0 88
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#define FPU_CTX_F23_F0 92
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#define FPU_CTX_F24_F0 96
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#define FPU_CTX_F25_F0 100
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#define FPU_CTX_F26_F0 104
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#define FPU_CTX_F27_F0 108
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#define FPU_CTX_F28_F0 112
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#define FPU_CTX_F29_F0 116
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#define FPU_CTX_F30_F0 120
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#define FPU_CTX_F31_F0 124
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#define FPU_CTX_FCSR_F0 128
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#endif
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#endif
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