90 lines
3.0 KiB
C
90 lines
3.0 KiB
C
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/*
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* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
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*
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* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
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* the the People's Republic of China and other countries.
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* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
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*
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* DISCLAIMER
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* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
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* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
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* IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
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* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
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* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
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* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
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* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
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* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
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* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
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* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __TWI_SUN20IW3_H__
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#define __TWI_SUN20IW3_H__
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/** the irq of each TWI **/
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#ifdef CONFIG_ARCH_SUN20IW3
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#define SUNXI_GIC_START 16
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#else
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#define SUNXI_GIC_START 0
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#endif
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/** the base address of TWI*/
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#define SUNXI_TWI0_PBASE 0x02502000
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#define SUNXI_IRQ_TWI0 (41 - SUNXI_GIC_START)
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#define TWI0_SCK GPIOA(16)
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#define TWI0_SDA GPIOA(17)
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#define TWI0_PIN_MUXSEL 4
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#define SUNXI_TWI1_PBASE 0x02502400
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#define SUNXI_IRQ_TWI1 (42 - SUNXI_GIC_START)
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#define TWI1_SCK GPIOA(14)
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#define TWI1_SDA GPIOA(15)
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#define TWI1_PIN_MUXSEL 4
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#define SUNXI_TWI2_PBASE 0x02502800
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#define SUNXI_IRQ_TWI2 (43 - SUNXI_GIC_START)
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#define TWI2_SCK GPIOH(5)
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#define TWI2_SDA GPIOH(6)
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#define TWI2_PIN_MUXSEL 4
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#define SUNXI_TWI3_PBASE 0x02502c00
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#define SUNXI_IRQ_TWI3 (44 - SUNXI_GIC_START)
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#define TWI3_SCK GPIOI(3)
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#define TWI3_SDA GPIOI(4)
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#define TWI3_PIN_MUXSEL 6
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#define SUNXI_TWI4_PBASE 0x02503000
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#define SUNXI_IRQ_TWI4 (45 - SUNXI_GIC_START)
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#define TWI4_SCK GPIOI(1)
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#define TWI4_SDA GPIOI(2)
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#define TWI4_PIN_MUXSEL 6
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#define TWI_DISABLE_PIN_MUXSEL 15
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#define TWI_PULL_STATE 1
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#define TWI_DRIVE_STATE 0
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#define SUNXI_CLK_TWI(x) HAL_CLK_PERIPH_TWI##x
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#define SUNXI_CLK_RST_TWI(x) 0
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/*
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#if (defined(CONFIG_ARCH_SUN20IW3) || defined(CONFIG_SOC_SUN20IW1))
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#define S_TWI0_SCK GPIOI(0)
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#define S_TWI0_SDA GPIOI(1)
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#define S_TWI0_PIN_MUXSEL 0
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#endif
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*/
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#endif /*__TWI_SUN20IW3_H__ */
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