68 lines
2.0 KiB
C
68 lines
2.0 KiB
C
/*
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* Copyright (C) 2016 Allwinner.
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*
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*
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* SUNXI LEDC Controller Definition
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SUNXI_LEDC_H_
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#define _SUNXI_LEDC_H_
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/*interrupt ctrol*/
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enum sunxi_ledc_irq_ctrl{
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LEDC_TRANS_FINISH_INT_EN = (1 << 0),
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LEDC_FIFO_CPUREQ_INT_EN = (1 << 1),
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LEDC_WAITDATA_TIMEOUT_INT_EN = (1 << 3),
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LEDC_FIFO_OVERFLOW_INT_EN = (1 << 4),
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LEDC_GLOBAL_INT_EN = (1 << 5),
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};
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/*interrupt status*/
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enum sunxi_ledc_irq_status{
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LEDC_TRANS_FINISH_INT = (1 << 0),
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LEDC_FIFO_CPUREQ_INT = (1 << 1),
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LEDC_WAITDATA_TIMEOUT_INT = (1 << 3),
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LEDC_FIFO_OVERFLOW_INT = (1 << 4),
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LEDC_FIFO_FULL = (1 << 16),
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LEDC_FIFO_EMPTY = (1 << 17),
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};
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#define LEDC_BASE_ADDR 0x6700000
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#define LEDC_CONTROL_OFFSET 0x50
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#define FIFO_SIZE 128
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#define LEDC_CLOCK_ADDR 0x03001BF0
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struct sunxi_ledc_reg{
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volatile unsigned int ctrl; /* control */
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volatile unsigned int time01; /* t01 time */
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volatile unsigned int fnsh_cnt; /* data finish count */
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volatile unsigned int rst_t; /* reset time */
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volatile unsigned int t0_ctrl; /* wait time0 control */
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volatile unsigned int data_reg; /* LEDC data */
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volatile unsigned int DMA_ctrl; /* DMA control */
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volatile unsigned int irq_ctrl; /* interrupt control */
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volatile unsigned int irq_sta; /* interrupt status */
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volatile unsigned int reserved; /* reserved */
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volatile unsigned int t1_ctrl; /* wait time1 control */
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volatile unsigned int version; /* LEDC version */
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volatile unsigned int fifo; /* LEDC fifo data */
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};
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struct sunxi_ccmu_reg{
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volatile unsigned int model_clk; /* 0xBF0 LEDC clock */
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volatile unsigned int reserved1[2]; /* 0xBF4 0xBF8 */
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volatile unsigned int bus_gate; /* 0xBFC BUS gating */
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};
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int sunxi_ledc_init(void);
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int sunxi_set_led_brightness(unsigned int length, unsigned int g, unsigned int r, unsigned int b);
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int sunxi_ledc_exit(void);
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#endif
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