291 lines
8.3 KiB
C
Executable File
291 lines
8.3 KiB
C
Executable File
/*
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* Copyright (C) 2022 XRADIO TECHNOLOGY CO., LTD. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <string.h>
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#include <sys/endian.h>
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#include "kernel/os/os.h"
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#include "driver/chip/hal_gpio.h"
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#include "driver/chip/hal_spi.h"
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#include "kernel/os/os_queue.h"
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#include "FreeRTOS.h"
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#include "xrlink/xrlink_io.h"
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#define GPIO_PORT_SPI_IRQ GPIO_PORT_B
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#define GPIO_PIN_SPI_IRQ GPIO_PIN_14
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#define GPIO_PORT_SPI_RW GPIO_PORT_B
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#define GPIO_PIN_SPI_RW GPIO_PIN_15
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#define SLAVE_SPI_PORT SPI0
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#define SLAVE_SPI_FIRST_BIT SPI_TCTRL_FBS_MSB
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#define SLAVE_SPI_SCLK_MODE SPI_SCLK_Mode0
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#define SLAVE_SPI_MCLK (50 * 1000 * 1000)
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#define SLAVE_SPI_CS_LEVEL (0)
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#define SPI_DBG_ON 0
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#define SPI_WRN_ON 0
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#define SPI_ERR_ON 1
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#define SPI_INF_ON 1
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#define GPIO_WRITE_LEVEL 1
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#define GPIO_READ_LEVEL 0
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#define SPI_SYSLOG printf
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#define SPI_LOG(flags, fmt, arg...) \
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do { \
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if (flags) \
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SPI_SYSLOG(fmt, ##arg); \
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} while (0)
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#define SPI_INF(fmt, arg...) \
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SPI_LOG(SPI_INF_ON, "[SPI DBG] "fmt, ##arg)
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#define SPI_DBG(fmt, arg...) \
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SPI_LOG(SPI_DBG_ON, "[SPI DBG] "fmt, ##arg)
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#define SPI_WRN(fmt, arg...) \
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SPI_LOG(SPI_WRN_ON, "[SPI WRN] "fmt, ##arg)
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#define SPI_ERR(fmt, arg...) \
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do { \
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SPI_LOG(SPI_ERR_ON, "[SPI ERR] %s():%d, "fmt, \
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__func__, __LINE__, ##arg); \
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} while (0)
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static int xr_spi_gpio_init(void);
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static int xr_spi_gpio_deinit(void);
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static int xr_spi_irq_gpio_ctl(uint8_t level);
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static void xr_spi_rw_gpio_ctl(uint8_t level);
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static int xr_spi_bus_init(void);
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static void xr_spi_bus_deinit(void);
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static int xr_spi_bus_write(uint8_t *tx_buf, uint16_t len);
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static int xr_spi_bus_read(uint8_t *rx_buf, uint16_t len);
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static int xr_spi_bus_read_cancel(void);
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static OS_Semaphore_t slave_spi_cs_del_sem;
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static SPI_Device g_spi_cfg_param = {
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.port = SLAVE_SPI_PORT,
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.cs = SPI_TCTRL_SS_SEL_SS0,
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.config.mode = SPI_CTRL_MODE_SLAVE,
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.config.opMode = SPI_OPERATION_MODE_DMA,
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.config.firstBit = SLAVE_SPI_FIRST_BIT,
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.config.sclk = SLAVE_SPI_MCLK,
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.config.sclkMode = SLAVE_SPI_SCLK_MODE,
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};
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static xradio_bus_ops_t spi_bus_ops = {
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.gpio_init = xr_spi_gpio_init,
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.gpio_deinit = xr_spi_gpio_deinit,
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.irq_gpio_ctl = xr_spi_irq_gpio_ctl,
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.init = xr_spi_bus_init,
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.write = xr_spi_bus_write,
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.read = xr_spi_bus_read,
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.read_cancel = xr_spi_bus_read_cancel,
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.deinit = xr_spi_bus_deinit,
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};
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static int xr_spi_gpio_init(void)
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{
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GPIO_InitParam param;
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SPI_INF("xradio spi gpio init.\n");
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param.driving = GPIO_DRIVING_LEVEL_3;
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param.mode = GPIOx_Pn_F1_OUTPUT;
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param.pull = GPIO_PULL_UP;
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//GPIO RW INIT
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HAL_GPIO_Init(GPIO_PORT_SPI_RW, GPIO_PIN_SPI_RW, ¶m);
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//GPIO IRQ INIT
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HAL_GPIO_Init(GPIO_PORT_SPI_IRQ, GPIO_PIN_SPI_IRQ, ¶m);
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xr_spi_irq_gpio_ctl(0);
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xr_spi_rw_gpio_ctl(1);
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return 0;
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}
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static int xr_spi_gpio_deinit(void)
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{
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//GPIO IRQ DEINIT
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HAL_GPIO_DeInit(GPIO_PORT_SPI_IRQ, GPIO_PIN_SPI_IRQ);
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//GPIO RW DEINIT
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HAL_GPIO_DeInit(GPIO_PORT_SPI_RW, GPIO_PIN_SPI_RW);
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return 0;
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}
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static void xr_spi_rw_gpio_ctl(uint8_t level)
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{
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HAL_GPIO_WritePin(GPIO_PORT_SPI_RW, GPIO_PIN_SPI_RW,
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level ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
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}
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static int xr_spi_irq_gpio_ctl(uint8_t level)
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{
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HAL_GPIO_WritePin(GPIO_PORT_SPI_IRQ, GPIO_PIN_SPI_IRQ,
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level ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
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return 0;
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}
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static void slave_spi_cs_del_irq_cb(uint32_t irq, void *arg)
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{
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OS_SemaphoreRelease(&slave_spi_cs_del_sem);
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}
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static int xr_spi_bus_init(void)
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{
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int ret;
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static const SPI_Global_Config board_spi_param = {
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.mclk = SLAVE_SPI_MCLK,
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.cs_level = SLAVE_SPI_CS_LEVEL
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};
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SPI_INF("xradio spi init.\n");
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ret = HAL_SPI_Init(g_spi_cfg_param.port, &board_spi_param);
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if (ret != 0) {
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SPI_ERR("HAL_SPI_Init failed\r\n");
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return -1;
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}
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/* init spi */
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if (HAL_SPI_Slave_Open(g_spi_cfg_param.port, g_spi_cfg_param.cs,
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&g_spi_cfg_param.config, 5000) != HAL_OK) {
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HAL_SPI_Deinit(g_spi_cfg_param.port);
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SPI_ERR("HAL_SPI_Slave_Open() fail\n");
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return -1;
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}
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DMA_ChannelInitParam dma_param;
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memset(&dma_param, 0, sizeof(dma_param));
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dma_param.irqType = DMA_IRQ_TYPE_NONE;
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dma_param.endCallback = NULL;
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if (HAL_SPI_Slave_InitTxDMA(g_spi_cfg_param.port, &dma_param) != HAL_OK) {
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SPI_ERR("HAL_SPI_Slave_InitTxDMA() fail\n");
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}
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if (HAL_SPI_Slave_InitRxDMA(g_spi_cfg_param.port, &dma_param) != HAL_OK) {
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SPI_ERR("HAL_SPI_Slave_InitRxDMA() fail\n");
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}
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if (OS_SemaphoreCreateBinary(&slave_spi_cs_del_sem) != OS_OK) {
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SPI_ERR("create slave_spi_sem_tx fail\r\n");
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}
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SPI_IrqParam irq_param;
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irq_param.irqMask = SPI_INT_CS_DESELECT;
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/* or SPI_INT_TRANSFER_COMPLETE/SPI_INT_CS_DESELECT */
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irq_param.callback = slave_spi_cs_del_irq_cb;
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irq_param.arg = NULL;
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HAL_SPI_Slave_EnableIRQ(g_spi_cfg_param.port, &irq_param);
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return 0;
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}
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static void xr_spi_bus_deinit(void)
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{
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SPI_INF("xradio spi deinit.\n");
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HAL_SPI_Slave_DisableIRQ(g_spi_cfg_param.port);
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HAL_SPI_Slave_DeInitRxDMA(g_spi_cfg_param.port);
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HAL_SPI_Slave_DeInitTxDMA(g_spi_cfg_param.port);
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HAL_SPI_Slave_Close(g_spi_cfg_param.port);
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HAL_SPI_Deinit(g_spi_cfg_param.port);
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OS_SemaphoreDelete(&slave_spi_cs_del_sem);
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}
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static int xr_spi_bus_write(uint8_t *tx_buf, uint16_t len)
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{
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int ret = -1;
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if (HAL_SPI_Slave_StartTransmit_DMA(g_spi_cfg_param.port, tx_buf, len) != HAL_OK) {
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SPI_ERR("HAL_SPI_Slave_StartTransmit_DMA() fail\n");
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return ret;
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}
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xr_spi_rw_gpio_ctl(GPIO_WRITE_LEVEL);
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if (OS_SemaphoreWait(&slave_spi_cs_del_sem, 5000) != OS_OK) {
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SPI_ERR("%s(), wait timeout\n", __func__);
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HAL_SPI_Slave_StopTransmit_DMA(g_spi_cfg_param.port);
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return ret;
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}
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ret = HAL_SPI_Slave_StopTransmit_DMA(g_spi_cfg_param.port);
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if (ret != 0) {
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SPI_WRN("HAL_SPI_Slave_StopTransmit_DMA(), left %d\n", ret);
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}
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return ret;
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}
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static int xr_spi_bus_read(uint8_t *rx_buf, uint16_t len)
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{
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if (HAL_SPI_Slave_StartReceive_DMA(g_spi_cfg_param.port, rx_buf, len) != HAL_OK) {
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SPI_ERR("HAL_SPI_Slave_StartReceive_DMA() fail\n");
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return -1;
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}
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xr_spi_rw_gpio_ctl(GPIO_READ_LEVEL);
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if (OS_SemaphoreWait(&slave_spi_cs_del_sem, OS_WAIT_FOREVER) != OS_OK) {
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SPI_ERR("SPI read wait error\n");
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HAL_SPI_Slave_StopReceive_DMA(g_spi_cfg_param.port);
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return -1;
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}
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int32_t left = HAL_SPI_Slave_StopReceive_DMA(g_spi_cfg_param.port);
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if (left != 0) {
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SPI_WRN("HAL_SPI_Slave_StopReceive_DMA(), port %d, left %d\n",
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SLAVE_SPI_PORT, left);
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return left;
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}
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return len;
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}
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static int xr_spi_bus_read_cancel(void)
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{
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return OS_SemaphoreRelease(&slave_spi_cs_del_sem);
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}
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xradio_bus_ops_t *xradio_get_bus_ops(void)
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{
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return &spi_bus_ops;
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}
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