120 lines
3.7 KiB
C
120 lines
3.7 KiB
C
/*
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* (C) Copyright 20018-2019
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*
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* Description: spinor driver for General spinor operations
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* Author: wangwei <wangwei@allwinnertech.com>
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* Date: 2018-11-15 14:18:18
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*/
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#ifndef __SUNXI_SPINOR_H
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#define __SUNXI_SPINOR_H
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#include <common.h>
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#include <asm/io.h>
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#include <arch/spi-mem.h>
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#define SPINOR_BOOT_PARAM_MAGIC "NORPARAM"
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typedef struct {
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u8 magic[8];
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__s32 readcmd;
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__s32 read_mode;
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__s32 write_mode;
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__s32 flash_size;
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__s32 addr4b_opcodes;
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__s32 erase_size;
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__s32 delay_cycle; //When the frequency is greater than 60MHZ configured as 1;when the frequency is less than 24MHZ configured as 2;and other 3
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__s32 lock_flag;
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__s32 frequency;
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unsigned int sample_delay;
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unsigned int sample_mode;
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enum spi_nor_protocol read_proto;
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enum spi_nor_protocol write_proto;
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u8 read_dummy;
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} boot_spinor_info_t;
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/* Erase commands */
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#define CMD_ERASE_4K 0x20
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#define CMD_ERASE_CHIP 0xc7
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#define CMD_ERASE_64K 0xd8
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/* Write commands */
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#define CMD_WRITE_STATUS 0x01
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#define CMD_WRITE_STATUS1 0x31
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#define CMD_WRITE_CONFIG1 0xb1
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#define CMD_PAGE_PROGRAM 0x02
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#define CMD_WRITE_DISABLE 0x04
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#define CMD_WRITE_ENABLE 0x06
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#define CMD_QUAD_PAGE_PROGRAM 0x32
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/* Used for Macronix and Winbond flashes. */
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#define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */
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#define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */
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/* Used for Spansion flashes only. */
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#define SPINOR_OP_BRWR 0x17 /* Bank register write */
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#define SPINOR_OP_BRRD 0x16 /* Bank register read */
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#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */
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/* Read commands */
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#define CMD_READ_ARRAY_SLOW 0x03
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#define CMD_READ_ARRAY_SLOW_4B 0x13
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#define CMD_READ_ARRAY_FAST 0x0b
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#define CMD_READ_ARRAY_FAST_4B 0x0c
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#define CMD_READ_DUAL_OUTPUT_FAST 0x3b
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#define CMD_READ_DUAL_IO_FAST 0xbb
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#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
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#define CMD_READ_QUAD_IO_FAST 0xeb
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#define CMD_READ_ID 0x9f
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#define CMD_READ_STATUS 0x05
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#define CMD_READ_STATUS1 0x35
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#define CMD_READ_CONFIG 0x35
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#define CMD_READ_CONFIG1 0xb5
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#define CMD_FLAG_STATUS 0x70
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/*work mode*/
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#define SPINOR_QUAD_MODE 4
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#define SPINOR_DUAL_MODE 2
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#define SPINOR_SINGLE_MODE 1
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#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */
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#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */
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#define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
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#define SPINOR_OP_READ_1_4_4_DTR 0xed
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/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
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#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */
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#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */
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#define SPINOR_OP_READ4_1_4_4 0xec /* Read data bytes (Quad I/O SPI) */
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#define SPINOR_OP_READ4_1_4_4_DTR 0xee
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/* CFI Manufacture ID's */
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#define SPI_FLASH_CFI_MFR_SPANSION 0x01
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//#define SPI_FLASH_CFI_MFR_STMICRO 0x20
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#define SPI_FLASH_CFI_MFR_XMC 0x20
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#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
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#define SPI_FLASH_CFI_MFR_SST 0xbf
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#define SPI_FLASH_CFI_MFR_WINBOND 0xef
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#define SPI_FLASH_CFI_MFR_ATMEL 0x1f
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#define SPI_FLASH_CFI_MFR_GIGADEVICE 0xc8
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#define SPI_FLASH_CFI_MFR_ADESTO 0x1f
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#define SPI_FLASH_CFI_MFR_ESMT 0x1c
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#define SPI_FLASH_CFI_MFR_PUYA 0x85
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#define SPI_FLASH_CFI_MFR_ZETTA 0xba
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#define SPI_FLASH_CFI_MFR_BOYA 0x68
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#define SPI_FLASH_CFI_MFR_XTX 0x0b
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#define SPI_FLASH_CFI_MFR_FM 0xa1
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#define STATUS_WIP (1 << 0)
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#define STATUS_QEB_WINSPAN (1 << 1)
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#define STATUS_QEB_MXIC (1 << 6)
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#define STATUS_QEB_GIGA (1 << 1)
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//#define STATUS_QEB_STMICRO (1 << 3)
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int spinor_init(int stage);
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int spinor_exit(int force);
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int spinor_read(uint start, uint nblock, void *buffer);
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#endif
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