523 lines
13 KiB
C
523 lines
13 KiB
C
/*
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* Copyright (c) 2021-2028 Allwinnertech Co., Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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//#define DEBUG
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include <linux/timer.h>
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#include <linux/input.h>
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#include <linux/slab.h>
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#include <linux/miscdevice.h>
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#include <linux/delay.h>
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#include <linux/reset.h>
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#include <asm/irq.h>
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#include <linux/input.h>
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#include "sunxi-wiegand.h"
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struct sunxi_wiegand {
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struct clk *pclk;
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struct clk *wclk;
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struct device *dev;
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struct pinctrl *pctrl;
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void __iomem *base;
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int irq;
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struct input_dev *input_dev;
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struct reset_control *reset;
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struct sunxi_wiegand_config config;
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};
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static u32 sunxi_wiegand_read(struct sunxi_wiegand *chip, u32 reg)
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{
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u32 val = readl(chip->base + reg);
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dev_dbg(chip->dev, "%s(): read reg 0x%x = 0x%x\n", __func__, reg, val);
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return val;
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}
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static void sunxi_wiegand_write(struct sunxi_wiegand *chip, u32 reg, u32 val)
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{
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writel(val, chip->base + reg);
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dev_dbg(chip->dev, "%s(): write reg 0x%x = 0x%x\n", __func__, reg, val);
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}
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static int wiegand_get_data_and_report(struct sunxi_wiegand *chip)
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{
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u32 reg_val;
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u32 reg_check;
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reg_val = sunxi_wiegand_read(chip, WIEGAND_ISR);
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if (reg_val & WIEGAND_ISR_TIME_OUT) {
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dev_dbg(chip->dev, "%s: the irq is from timeout!\n", __func__);
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return 0;
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}
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if (reg_val & WIEGAND_ISR_RECEIVE_DATA)
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dev_dbg(chip->dev, "%s: the irq is from receive data!\n", __func__);
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reg_val = sunxi_wiegand_read(chip, WIEGAND_RXD);
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reg_check = sunxi_wiegand_read(chip, WIEGAND_CBSR);
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if (reg_check == WIEGAND_CBSR_CHECK_OK) {
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dev_dbg(chip->dev, "%s: the odd parity and even parity ok!\n", __func__);
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input_event(chip->input_dev, EV_MSC, MSC_SCAN, reg_val);
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input_sync(chip->input_dev);
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} else if (reg_check == WIEGAND_CBSR_EVEN_FAILED) {
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dev_err(chip->dev, "%s: the even parity failed!\n", __func__);
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return -EPERM;
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} else if (reg_check == WIEGAND_CBSR_ODD_FAILED) {
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dev_err(chip->dev, "%s: the odd parity failed!\n", __func__);
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return -EPERM;
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} else if (reg_check == WIEGAND_CBSR_ODD_EVEN_FAILED) {
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dev_err(chip->dev, "%s: the odd parity and even parity failed\n", __func__);
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return -EPERM;
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}
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return 0;
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}
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static irqreturn_t wiegand_irq_handler(int irqnum, void *dev_id)
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{
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int reg_val;
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int err;
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struct sunxi_wiegand *chip = (struct sunxi_wiegand *)dev_id;
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err = wiegand_get_data_and_report(chip);
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if (err)
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dev_err(chip->dev, "%s: the get data and report failed\n", __func__);
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/* Clear the interrupt flag */
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reg_val = sunxi_wiegand_read(chip, WIEGAND_ISR);
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reg_val |= WIEGAND_ISR_RIS | WIEGAND_ISR_TRIS;
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sunxi_wiegand_write(chip, WIEGAND_ISR, reg_val);
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return IRQ_HANDLED;
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}
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static int sunxi_wiegand_select_gpio_state(struct sunxi_wiegand *chip, char *name)
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{
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int err;
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struct pinctrl_state *pctrl_state = NULL;
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pctrl_state = pinctrl_lookup_state(chip->pctrl, name);
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if (IS_ERR(pctrl_state)) {
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dev_err(chip->dev, "sunxi_wiegand_select_gpio_state look_state(%s) failed\n", name);
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return PTR_ERR(pctrl_state);
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}
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err = pinctrl_select_state(chip->pctrl, pctrl_state);
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if (err) {
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dev_err(chip->dev, "sunxi_wiegand_select_gpio_state select_state(%s) failed\n", name);
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return err;
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}
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return 0;
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}
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static int sunxi_wiegand_gpio_setup(struct sunxi_wiegand *chip)
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{
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chip->pctrl = devm_pinctrl_get(chip->dev);
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if (IS_ERR(chip->pctrl)) {
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dev_err(chip->dev, "devm_pinctrl_get() failed\n");
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return PTR_ERR(chip->pctrl);
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}
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return sunxi_wiegand_select_gpio_state(chip, PINCTRL_STATE_DEFAULT);
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}
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static void sunxi_wiegand_gpio_destroy(struct sunxi_wiegand *chip)
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{
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int err;
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err = sunxi_wiegand_select_gpio_state(chip, PINCTRL_STATE_SLEEP);
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if (err)
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dev_err(chip->dev, "%s():fail to select gpio state\n", __func__);
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}
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static int sunxi_wiegand_irq_setup(struct platform_device *pdev, struct sunxi_wiegand *chip)
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{
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int err;
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struct device *dev = &pdev->dev;
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chip->irq = platform_get_irq(pdev, 0);
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if (chip->irq < 0) {
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dev_err(dev, "No IRQ resource\n");
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return -EINVAL;
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}
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err = devm_request_irq(dev, chip->irq, wiegand_irq_handler, 0, dev_name(dev), chip);
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if (err) {
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dev_err(dev, "Could not request IRQ\n");
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return err;
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}
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return 0;
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}
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static void sunxi_wiegand_irq_destroy(struct sunxi_wiegand *chip)
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{
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}
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static int sunxi_wiegand_clk_enable(struct sunxi_wiegand *chip)
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{
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int err;
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err = clk_prepare_enable(chip->pclk);
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if (err) {
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dev_err(chip->dev, "Cannot enable clock 'pclk'\n");
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goto err0;
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}
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err = clk_prepare_enable(chip->wclk);
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if (err) {
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dev_err(chip->dev, "Cannot enable clock 'wclk'\n");
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goto err1;
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}
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return 0;
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err1:
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clk_disable_unprepare(chip->pclk);
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err0:
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return err;
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}
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static void sunxi_wiegand_clk_disable(struct sunxi_wiegand *chip)
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{
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clk_disable_unprepare(chip->pclk);
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clk_disable_unprepare(chip->wclk);
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}
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static int sunxi_wiegand_clk_setup(struct sunxi_wiegand *chip)
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{
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int err;
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chip->pclk = devm_clk_get(chip->dev, "pclk");
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if (IS_ERR(chip->pclk)) {
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dev_err(chip->dev, "Failed to get clock 'pclk'\n");
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return PTR_ERR(chip->pclk);
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}
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chip->wclk = devm_clk_get(chip->dev, "wclk");
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if (IS_ERR(chip->wclk)) {
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dev_err(chip->dev, "Failed to get clock 'wclk'\n");
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return PTR_ERR(chip->wclk);
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}
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err = sunxi_wiegand_clk_enable(chip);
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if (err)
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return err;
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return 0;
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}
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static void sunxi_wiegand_clk_destroy(struct sunxi_wiegand *chip)
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{
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sunxi_wiegand_clk_disable(chip);
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}
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/* initialization register */
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static int sunxi_wiegand_hwinit(struct platform_device *pdev, struct sunxi_wiegand *chip)
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{
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int reg_val;
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int err;
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struct device_node *np = pdev->dev.of_node;
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struct device *dev = &pdev->dev;
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struct sunxi_wiegand_config *config = &chip->config;
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err = of_property_read_u32(np, "protocol-type", &config->protocol_type);
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if (err) {
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dev_err(dev, "%s: get the protocol-type failed!\n", __func__);
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return err;
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}
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dev_dbg(dev, "%s: the protocol-type is %d (0:26bit, 1:34bit)\n", __func__, config->protocol_type);
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sunxi_wiegand_write(chip, WIEGAND_WMR, config->protocol_type);
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err = of_property_read_u32(np, "high-parity-polar", &config->high_parity_polar);
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if (err) {
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dev_err(dev, "%s: get high-parity-polar failed!\n", __func__);
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return err;
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}
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reg_val = sunxi_wiegand_read(chip, WIEGAND_CBP);
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reg_val &= ~(BIT(1));
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reg_val |= (config->high_parity_polar << 1);
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sunxi_wiegand_write(chip, WIEGAND_CBP, reg_val);
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dev_dbg(dev, "%s: the high-parity-polar is %d (0:even check 1:odd check)\n", __func__, config->high_parity_polar);
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err = of_property_read_u32(np, "low-parity-polar", &config->low_parity_polar);
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if (err) {
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dev_err(dev, "%s: get low-parity-polar failed!\n", __func__);
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return err;
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}
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reg_val = sunxi_wiegand_read(chip, WIEGAND_CBP);
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reg_val &= ~(BIT(0));
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reg_val |= (config->low_parity_polar << 0);
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sunxi_wiegand_write(chip, WIEGAND_CBP, reg_val);
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dev_dbg(dev, "%s: the low-parity-polar is %d (0:even check 1:odd check) \n", __func__, config->low_parity_polar);
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err = of_property_read_u32(np, "data-polar", &config->data_polar);
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if (err) {
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dev_err(dev, "%s: get data-polar failed!\n", __func__);
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return err;
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}
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reg_val = sunxi_wiegand_read(chip, WIEGAND_DBP);
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reg_val &= ~(BIT(0));
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reg_val |= (config->data_polar << 0);
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sunxi_wiegand_write(chip, WIEGAND_DBP, reg_val);
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dev_dbg(dev, "%s: the data-polar is %d (0:normal, 1:inverse)\n", __func__, config->data_polar);
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err = of_property_read_u32(np, "clock-div", &config->clock_div);
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if (err) {
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dev_err(dev, "%s: get clock-div failed!\n", __func__);
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return err;
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}
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dev_dbg(dev, "%s: the clock-div is %d \n", __func__, config->clock_div);
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if (config->clock_div > 48) {
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config->clock_div = 48;
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} else if ((config->clock_div == 0) || (config->clock_div == 1)) {
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config->clock_div = 2;
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}
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sunxi_wiegand_write(chip, WIEGAND_CLK_DIV, config->clock_div);
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err = of_property_read_u32(np, "signal-duration", &config->signal_duration);
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if (err) {
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dev_err(dev, "%s: get signal-duration failed!\n", __func__);
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return err;
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}
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dev_dbg(dev, "%s: the signal-duration is %d \n", __func__, config->signal_duration);
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sunxi_wiegand_write(chip, WIEGAND_TP, config->signal_duration);
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err = of_property_read_u32(np, "signal-period", &config->signal_period);
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if (err) {
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dev_err(dev, "%s: get signal-period failed!\n", __func__);
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return err;
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}
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dev_dbg(dev, "%s: the signal-period is %d \n", __func__, config->signal_period);
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sunxi_wiegand_write(chip, WIEGAND_TW, config->signal_period);
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sunxi_wiegand_write(chip, WIEGAND_ICR, WIEGAND_ICR_VALUE);
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sunxi_wiegand_write(chip, WIEGAND_FUN_EN, WIEGAND_FUN_EN_VALUE);
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return 0;
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}
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static int sunxi_wiegand_input_setup(struct sunxi_wiegand *chip)
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{
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static struct input_dev *input_dev;
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int err;
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input_dev = input_allocate_device();
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if (!input_dev) {
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dev_err(chip->dev, "input_dev: not enough memory for input device\n");
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return -ENOMEM;
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}
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input_dev->name = "sunxi-wiegand0";
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input_dev->id.bustype = BUS_HOST;
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input_dev->id.vendor = 0x001;
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input_dev->id.product = 0x001;
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input_dev->id.version = 0x0100;
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input_dev->evbit[0] = BIT_MASK(EV_MSC);
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/* all input devices support EV_SYN synchronization events */
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set_bit(EV_MSC, input_dev->evbit);
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set_bit(MSC_SCAN, input_dev->mscbit);
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chip->input_dev = input_dev;
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err = input_register_device(chip->input_dev);
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if (err) {
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dev_err(chip->dev, "wiegand input register failed\n");
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goto err0;
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}
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return 0;
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err0:
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input_free_device(chip->input_dev);
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return err;
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}
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static void sunxi_wiegand_input_destroy(struct sunxi_wiegand *chip)
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{
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input_unregister_device(chip->input_dev);
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input_free_device(chip->input_dev);
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}
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static struct miscdevice wiegand_dev = {
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.minor = MISC_DYNAMIC_MINOR,
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.name = "wiegand driver",
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};
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static int sunxi_wiegand_probe(struct platform_device *pdev)
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{
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int err;
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struct sunxi_wiegand *chip = NULL;
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struct device *dev = &pdev->dev;
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struct resource *res;
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dev_dbg(dev, "%s(): BEGIN\n", __func__);
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chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
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if (!chip) {
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dev_err(dev, "fail to alloc memery\n");
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return -ENOMEM;
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}
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chip->dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "Fail to get IORESOURCE_MEM\n");
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return -EINVAL;
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}
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chip->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(chip->base)) {
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dev_err(dev, "Fail to map IO resource\n");
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return PTR_ERR(chip->base);
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}
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err = misc_register(&wiegand_dev);
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if (err) {
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dev_err(dev, "misc_register() failed!\n");
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goto err0;
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}
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err = sunxi_wiegand_input_setup(chip);
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if (err) {
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dev_err(dev, "sunxi_wiegand_input_setup() failed\n");
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goto err1;
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}
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err = sunxi_wiegand_clk_setup(chip);
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if (err) {
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dev_err(dev, "sunxi_wiegand_clk_setup() failed!\n");
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goto err2;
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}
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err = sunxi_wiegand_gpio_setup(chip);
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if (err) {
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dev_err(dev, "sunxi_wiegand_gpio_setup() failed!\n");
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goto err3;
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}
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err = sunxi_wiegand_hwinit(pdev, chip);
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if (err) {
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dev_err(dev, "sunxi_wiegand_hwinit() failed\n");
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goto err4;
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}
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err = sunxi_wiegand_irq_setup(pdev, chip);
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if (err) {
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dev_err(dev, "sunxi_wiegand_irq_setup() failed!\n");
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goto err4;
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}
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platform_set_drvdata(pdev, chip);
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dev_dbg(dev, "%s():success!\n", __func__);
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return 0;
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err4:
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sunxi_wiegand_gpio_destroy(chip);
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err3:
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sunxi_wiegand_clk_destroy(chip);
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err2:
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sunxi_wiegand_input_destroy(chip);
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err1:
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misc_deregister(&wiegand_dev);
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err0:
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return err;
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}
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static int sunxi_wiegand_remove(struct platform_device *pdev)
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{
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struct sunxi_wiegand *chip = platform_get_drvdata(pdev);
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sunxi_wiegand_irq_destroy(chip);
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sunxi_wiegand_gpio_destroy(chip);
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sunxi_wiegand_clk_destroy(chip);
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sunxi_wiegand_input_destroy(chip);
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misc_deregister(&wiegand_dev);
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return 0;
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}
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#ifdef CONFIG_PM
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static int sunxi_wiegand_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sunxi_wiegand *chip = platform_get_drvdata(pdev);
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dev_dbg(dev, "sunxi_wiegand_suspend\n");
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disable_irq(chip->irq);
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sunxi_wiegand_select_gpio_state(chip, PINCTRL_STATE_SLEEP);
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sunxi_wiegand_clk_disable(chip);
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return 0;
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}
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static int sunxi_wiegand_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sunxi_wiegand *chip = platform_get_drvdata(pdev);
|
|
|
|
dev_dbg(dev, "sunxi_wiegand_resume\n");
|
|
|
|
sunxi_wiegand_clk_enable(chip);
|
|
sunxi_wiegand_select_gpio_state(chip, PINCTRL_STATE_DEFAULT);
|
|
enable_irq(chip->irq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops sunxi_wiegand_pm_ops = {
|
|
.suspend = sunxi_wiegand_suspend,
|
|
.resume = sunxi_wiegand_resume,
|
|
};
|
|
#define SUNXI_WIEGAND_PM_OPS (&sunxi_wiegand_pm_ops)
|
|
#else
|
|
#define SUNXI_WIEGAND_PM_OPS NULL
|
|
#endif
|
|
|
|
static const struct of_device_id sunxi_wiegand_of_match[] = {
|
|
{ .compatible = "allwinner,sunxi-wiegand", },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, sunxi_wiegand_of_match);
|
|
|
|
static struct platform_driver sunxi_wiegand_driver = {
|
|
.probe = sunxi_wiegand_probe,
|
|
.remove = sunxi_wiegand_remove,
|
|
.driver = {
|
|
.name = "sunxi-wiegand",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = sunxi_wiegand_of_match,
|
|
.pm = SUNXI_WIEGAND_PM_OPS,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(sunxi_wiegand_driver);
|
|
MODULE_AUTHOR("Lu Ruixiang <luruixiang@allwinnertech.com>");
|
|
MODULE_DESCRIPTION("sunxi wiegand driver");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_VERSION("v0.1.0");
|