372 lines
14 KiB
C
372 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __AW_SPINAND_H
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#define __AW_SPINAND_H
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#include <linux/mutex.h>
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#include <linux/spi/spi.h>
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#define AW_OOB_SIZE_PER_PHY_PAGE (16)
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/**
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* In order to fix for nftl nand, make they has the same address
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* for saving crc16
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*/
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#define AW_CRC16_OOB_OFFSET (12)
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#define SBROM_TOC0_HEAD_SPACE (0x80)
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#define STORAGE_BUFFER_SIZE (256)
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#define STAMP_VALUE 0x5F0A6C39
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#define MAX_ID_LEN 8
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/* ecc status */
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#define ECC_GOOD (0 << 4)
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#define ECC_LIMIT (1 << 4)
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#define ECC_ERR (2 << 4)
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#define SPI_SELECT_ODDNUM_BLACK 0x10
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#define SECBLK_READ _IO('V', 20)
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#define SECBLK_WRITE _IO('V', 21)
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#define SECBLK_IOCTL _IO('V', 22)
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#define BLKBURNBOOT0 _IO('v', 127)
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#define BLKBURNBOOT1 _IO('v', 128)
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struct aw_spinand_ecc;
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struct aw_spinand_info;
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struct aw_spinand_phy_info;
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struct aw_spinand_chip_ops;
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struct aw_spinand_chip {
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struct aw_spinand_chip_ops *ops;
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struct aw_spinand_ecc *ecc;
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struct aw_spinand_cache *cache;
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struct aw_spinand_info *info;
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struct aw_spinand_bbt *bbt;
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struct spi_device *spi;
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unsigned int rx_bit;
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unsigned int tx_bit;
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unsigned int freq;
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void *priv;
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};
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struct aw_spinand_chip_request {
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unsigned int block;
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unsigned int page;
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unsigned int pageoff;
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unsigned int ooblen;
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unsigned int datalen;
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void *databuf;
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void *oobbuf;
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unsigned int oobleft;
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unsigned int dataleft;
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#define AW_SPINAND_MTD_OPS_RAW (2)
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int mode;
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};
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struct aw_spinand_chip_ops {
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int (*get_block_lock)(struct aw_spinand_chip *chip, u8 *reg_val);
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int (*set_block_lock)(struct aw_spinand_chip *chip, u8 reg_val);
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int (*get_otp)(struct aw_spinand_chip *chip, u8 *reg_val);
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int (*set_otp)(struct aw_spinand_chip *chip, u8 reg_val);
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int (*get_driver_level)(struct aw_spinand_chip *chip, u8 *reg_val);
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int (*set_driver_level)(struct aw_spinand_chip *chip, u8 reg_val);
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int (*reset)(struct aw_spinand_chip *chip);
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int (*read_status)(struct aw_spinand_chip *chip, u8 *status);
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int (*read_id)(struct aw_spinand_chip *chip, void *id, int len,
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int dummy);
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int (*read_reg)(struct aw_spinand_chip *chip, u8 cmd, u8 reg, u8 *val);
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int (*write_reg)(struct aw_spinand_chip *chip, u8 cmd, u8 reg, u8 val);
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int (*is_bad)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*mark_bad)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*erase_block)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*write_page)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*read_page)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*phy_is_bad)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*phy_mark_bad)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*phy_erase_block)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*phy_write_page)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*phy_read_page)(struct aw_spinand_chip *chip,
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struct aw_spinand_chip_request *req);
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int (*phy_copy_block)(struct aw_spinand_chip *chip,
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unsigned int from_blk, unsigned int to_blk);
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};
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struct aw_spinand_info {
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const char *(*model)(struct aw_spinand_chip *chip);
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const char *(*manufacture)(struct aw_spinand_chip *chip);
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void (*nandid)(struct aw_spinand_chip *chip, unsigned char *id, int cnt);
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unsigned int (*die_cnt)(struct aw_spinand_chip *chip);
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unsigned int (*oob_size)(struct aw_spinand_chip *chip);
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unsigned int (*sector_size)(struct aw_spinand_chip *chip);
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unsigned int (*page_size)(struct aw_spinand_chip *chip);
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unsigned int (*block_size)(struct aw_spinand_chip *chip);
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unsigned int (*phy_oob_size)(struct aw_spinand_chip *chip);
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unsigned int (*phy_page_size)(struct aw_spinand_chip *chip);
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unsigned int (*phy_block_size)(struct aw_spinand_chip *chip);
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unsigned int (*total_size)(struct aw_spinand_chip *chip);
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int (*operation_opt)(struct aw_spinand_chip *chip);
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int (*max_erase_times)(struct aw_spinand_chip *chip);
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/* private data */
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struct aw_spinand_phy_info *phy_info;
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};
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typedef struct {
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__u8 ChipCnt; /* the count of the total nand flash chips are currently connecting on the CE pin */
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__u8 ConnectMode; /* the rb connect mode */
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__u8 BankCntPerChip; /* the count of the banks in one nand chip, multiple banks can support Inter-Leave */
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__u8 DieCntPerChip; /* the count of the dies in one nand chip, block management is based on Die */
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__u8 PlaneCntPerDie; /* the count of planes in one die, multiple planes can support multi-plane operation */
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__u8 SectorCntPerPage; /* the count of sectors in one single physic page, one sector is 0.5k */
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__u16 ChipConnectInfo; /* chip connect information, bit == 1 means there is a chip connecting on the CE pin */
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__u32 PageCntPerPhyBlk; /* the count of physic pages in one physic block */
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__u32 BlkCntPerDie; /* the count of the physic blocks in one die, include valid block and invalid block */
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__u32 OperationOpt; /* the mask of the operation types which current nand flash can support support */
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__u32 FrequencePar; /* the parameter of the hardware access clock, based on 'MHz' */
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__u32 SpiMode; /* spi nand mode, 0:mode 0, 3:mode 3 */
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__u8 NandChipId[8]; /* the nand chip id of current connecting nand chip */
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__u32 pagewithbadflag; /* bad block flag was written at the first byte of spare area of this page */
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__u32 MultiPlaneBlockOffset; /* the value of the block number offset between the two plane block */
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__u32 MaxEraseTimes; /* the max erase times of a physic block */
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__u32 MaxEccBits; /* the max ecc bits that nand support */
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__u32 EccLimitBits; /* the ecc limit flag for tne nand */
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__u32 uboot_start_block;
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__u32 uboot_next_block;
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__u32 logic_start_block;
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__u32 nand_specialinfo_page;
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__u32 nand_specialinfo_offset;
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__u32 physic_block_reserved;
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__u32 sample_mode;
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__u32 sample_delay;
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__u32 Reserved[4];
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} boot_spinand_para_t;
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typedef struct {
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unsigned int ChannelCnt;
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/*count of total nand chips are currently connecting on the CE pin*/
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unsigned int ChipCnt;
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/*chip connect info, bit=1 means one chip connecting on the CE pin*/
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unsigned int ChipConnectInfo;
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unsigned int RbCnt;
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/*connect info of all rb chips are connected*/
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unsigned int RbConnectInfo;
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unsigned int RbConnectMode; /*rb connect mode*/
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/*count of banks in one nand chip, multi banks can support Inter-Leave*/
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unsigned int BankCntPerChip;
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/*count of dies in one nand chip, block management is based on Die*/
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unsigned int DieCntPerChip;
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/*count of planes in one die, >1 can support multi-plane operation*/
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unsigned int PlaneCntPerDie;
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/*count of sectors in one single physic page, one sector is 0.5k*/
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unsigned int SectorCntPerPage;
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/*count of physic pages in one physic block*/
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unsigned int PageCntPerPhyBlk;
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/*count of physic blocks in one die, include valid and invalid blocks*/
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unsigned int BlkCntPerDie;
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/*mask of operation types which current nand flash can support support*/
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unsigned int OperationOpt;
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/*parameter of hardware access clock, based on 'MHz'*/
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unsigned int FrequencePar;
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/*Ecc Mode for nand chip, 0: bch-16, 1:bch-28, 2:bch_32*/
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unsigned int EccMode;
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/*nand chip id of current connecting nand chip*/
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unsigned char NandChipId[8];
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/*ratio of valid physical blocks, based on 1024*/
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unsigned int ValidBlkRatio;
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unsigned int good_block_ratio; /*good block ratio get from hwscan*/
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unsigned int ReadRetryType; /*read retry type*/
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unsigned int DDRType;
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unsigned int Reserved[32];
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} boot_nand_para_t;
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typedef struct _normal_gpio_cfg {
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unsigned char port;
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unsigned char port_num;
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char mul_sel;
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char pull;
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char drv_level;
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char data;
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unsigned char reserved[2];
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} normal_gpio_cfg;
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/******************************************************************************/
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/* head of Boot0 */
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/******************************************************************************/
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typedef struct _boot0_private_head_t {
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unsigned int prvt_head_size;
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char prvt_head_vsn[4]; /* the version of boot0_private_head_t */
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unsigned int dram_para[32]; /* Original values is arbitrary */
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int uart_port;
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normal_gpio_cfg uart_ctrl[2];
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int enable_jtag; /* 1 : enable, 0 : disable */
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normal_gpio_cfg jtag_gpio[5];
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normal_gpio_cfg storage_gpio[32];
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char storage_data[512 - sizeof(normal_gpio_cfg) * 32];
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}
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boot0_private_head_t;
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typedef struct standard_Boot_file_head {
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unsigned int jump_instruction; /* one intruction jumping to real code */
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unsigned char magic[8]; /* ="eGON.BT0" or "eGON.BT1", not C-style string */
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unsigned int check_sum; /* generated by PC */
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unsigned int length; /* generated by PC */
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unsigned int pub_head_size; /* size of boot_file_head_t */
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unsigned char pub_head_vsn[4]; /* version of boot_file_head_t */
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unsigned char file_head_vsn[4]; /* version of boot0_file_head_t or boot1_file_head_t */
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unsigned char Boot_vsn[4]; /* Boot version */
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unsigned char eGON_vsn[4]; /* eGON version */
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unsigned char platform[8]; /* platform information */
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} standard_boot_file_head_t;
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typedef struct _boot0_file_head_t {
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standard_boot_file_head_t boot_head;
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boot0_private_head_t prvt_head;
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} boot0_file_head_t;
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typedef struct _boot_core_para_t {
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unsigned int user_set_clock;
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unsigned int user_set_core_vol;
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unsigned int vol_threshold;
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} boot_core_para_t;
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/******************************************************************************/
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/* head of Boot1 */
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/******************************************************************************/
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typedef struct _boot1_private_head_t {
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unsigned int dram_para[32];
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int run_clock; /* Mhz*/
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int run_core_vol; /* mV*/
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int uart_port;
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normal_gpio_cfg uart_gpio[2];
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int twi_port;
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normal_gpio_cfg twi_gpio[2];
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int work_mode;
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int storage_type; /* 0nand 1sdcard 2: spinor*/
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normal_gpio_cfg nand_gpio[32];
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char nand_spare_data[256];
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normal_gpio_cfg sdcard_gpio[32];
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char sdcard_spare_data[256];
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int reserved[6];
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} boot1_private_head_t;
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typedef struct _Boot_file_head {
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unsigned int jump_instruction; /* one intruction jumping to real code */
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unsigned char magic[8]; /* ="u-boot" */
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unsigned int check_sum; /* generated by PC */
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unsigned int align_size; /* align size in byte */
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unsigned int length; /* the size of all file */
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unsigned int uboot_length; /* the size of uboot */
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unsigned char version[8]; /* uboot version */
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unsigned char platform[8]; /* platform information */
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int reserved[1]; /* stamp space, 16bytes align */
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} boot_file_head_t;
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typedef struct _boot1_file_head_t {
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boot_file_head_t boot_head;
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boot1_private_head_t prvt_head;
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} boot1_file_head_t;
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typedef struct sbrom_toc0_config {
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unsigned char config_vsn[4];
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unsigned int dram_para[32];
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int uart_port;
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normal_gpio_cfg uart_ctrl[2];
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int enable_jtag;
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normal_gpio_cfg jtag_gpio[5];
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normal_gpio_cfg storage_gpio[50];
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char storage_data[384];
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unsigned int secure_dram_mbytes;
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unsigned int drm_start_mbytes;
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unsigned int drm_size_mbytes;
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unsigned int res[8];
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} sbrom_toc0_config_t;
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typedef struct {
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u8 name[8];
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u32 magic;
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u32 check_sum;
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u32 serial_num;
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u32 status;
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u32 items_nr;
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u32 length;
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u8 platform[4];
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u32 reserved[2];
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u32 end;
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} toc0_private_head_t;
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int addr_to_req(struct aw_spinand_chip *chip, struct aw_spinand_chip_request *req,
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unsigned int addr);
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int aw_spinand_chip_init(struct spi_device *spi, struct aw_spinand_chip *chip);
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void aw_spinand_chip_exit(struct aw_spinand_chip *chip);
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#define aw_spinand_hexdump(level, prefix, buf, len) \
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print_hex_dump(level, prefix, DUMP_PREFIX_OFFSET, 16, 1, \
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buf, len, true)
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#define aw_spinand_reqdump(func, note, req) \
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do { \
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func("%s(%d): %s\n", __func__, __LINE__, note); \
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func("\tblock: %u\n", (req)->block); \
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func("\tpage: %u\n", (req)->page); \
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func("\tpageoff: %u\n", (req)->pageoff); \
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if ((req)->databuf) \
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func("\tdatabuf: 0x%p\n", (req)->databuf); \
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else \
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func("\tdatabuf: NULL\n"); \
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func("\tdatalen: %u\n", (req)->datalen); \
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func("\tdataleft: %u\n", (req)->dataleft); \
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if ((req)->oobbuf) \
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func("\toobbuf: 0x%p\n", (req)->oobbuf); \
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else \
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func("\toobbuf: NULL\n"); \
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func("\tooblen: %u\n", (req)->ooblen); \
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func("\toobleft: %u\n", (req)->oobleft); \
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func("\n"); \
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} while (0)
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#if IS_ENABLED(CONFIG_AW_SPINAND_SECURE_STORAGE)
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struct aw_spinand_sec_sto {
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/* the follow three must be initialized by the caller before read/write */
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unsigned int startblk;
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unsigned int endblk;
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struct aw_spinand_chip *chip;
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unsigned int blk[2];
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int init_end;
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};
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int aw_spinand_secure_storage_read(struct aw_spinand_sec_sto *sec_sto,
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int item, char *buf, unsigned int len);
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int aw_spinand_secure_storage_write(struct aw_spinand_sec_sto *sec_sto,
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int item, char *buf, unsigned int len);
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int aw_spinand_mtd_read_secure_storage(struct mtd_info *mtd,
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int item, void *buf, unsigned int len);
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int aw_spinand_mtd_write_secure_storage(struct mtd_info *mtd,
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int item, void *buf, unsigned int len);
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#endif
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int aw_spinand_mtd_download_boot0(struct mtd_info *mtd,
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unsigned int len, void *buf);
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int aw_spinand_mtd_download_uboot(struct mtd_info *mtd,
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unsigned int len, void *buf);
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struct mtd_info *get_aw_spinand_mtd(void);
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int spinand_mtd_upload_bootpackage(struct mtd_info *mtd, loff_t from,
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unsigned int len, void *buf);
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int aw_spinand_chip_update_cfg(struct aw_spinand_chip *chip);
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#endif
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