518 lines
14 KiB
C
518 lines
14 KiB
C
/*
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* mipi subdev driver module
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*
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* Copyright (c) 2017 by Allwinnertech Co., Ltd. http://www.allwinnertech.com
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*
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* Authors: Zhao Wei <zhaowei@allwinnertech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <hal_mem.h>
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#include "../vin.h"
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#include "sunxi_mipi.h"
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struct mipi_dev *global_mipi[VIN_MAX_MIPI];
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bool mipi_probe_flag[VIN_MAX_MIPI];
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#define IS_FLAG(x, y) (((x)&(y)) == y)
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#if 0
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static struct combo_format sunxi_mipi_formats[] = {
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{
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.code = MEDIA_BUS_FMT_UYVY8_2X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_YUYV8_2X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_SBGGR8_1X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_SGBRG8_1X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_SGRBG8_1X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_SRGGB8_1X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_SBGGR10_1X10,
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.bit_width = RAW10,
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}, {
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.code = MEDIA_BUS_FMT_SGBRG10_1X10,
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.bit_width = RAW10,
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}, {
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.code = MEDIA_BUS_FMT_SGRBG10_1X10,
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.bit_width = RAW10,
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}, {
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.code = MEDIA_BUS_FMT_SRGGB10_1X10,
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.bit_width = RAW10,
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}, {
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.code = MEDIA_BUS_FMT_SBGGR12_1X12,
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.bit_width = RAW12,
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}, {
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.code = MEDIA_BUS_FMT_SGBRG12_1X12,
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.bit_width = RAW12,
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}, {
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.code = MEDIA_BUS_FMT_SGRBG12_1X12,
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.bit_width = RAW12,
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}, {
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.code = MEDIA_BUS_FMT_SRGGB12_1X12,
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.bit_width = RAW12,
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}, {
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.code = MEDIA_BUS_FMT_UYVY8_2X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_VYUY8_2X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_YUYV8_2X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_YVYU8_2X8,
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.bit_width = RAW8,
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}, {
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.code = MEDIA_BUS_FMT_UYVY10_2X10,
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.bit_width = RAW10,
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}, {
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.code = MEDIA_BUS_FMT_VYUY10_2X10,
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.bit_width = RAW10,
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}, {
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.code = MEDIA_BUS_FMT_YUYV10_2X10,
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.bit_width = RAW10,
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}, {
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.code = MEDIA_BUS_FMT_YVYU10_2X10,
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.bit_width = RAW10,
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}
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};
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static unsigned int data_formats_type(u32 code)
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{
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switch (code) {
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case MIPI_RAW8:
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case MIPI_RAW12:
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return RAW;
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case MIPI_YUV422:
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case MIPI_YUV422_10:
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return YUV;
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case MIPI_RGB565:
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return RGB;
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default:
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return RAW;
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}
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}
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#endif
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static enum pkt_fmt get_pkt_fmt(u32 code)
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{
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switch (code) {
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case MEDIA_BUS_FMT_RGB565_2X8_BE:
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return MIPI_RGB565;
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case MEDIA_BUS_FMT_UYVY8_1X16:
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case MEDIA_BUS_FMT_UYVY8_2X8:
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case MEDIA_BUS_FMT_VYUY8_2X8:
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case MEDIA_BUS_FMT_YUYV8_2X8:
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case MEDIA_BUS_FMT_YVYU8_2X8:
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return MIPI_YUV422;
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case MEDIA_BUS_FMT_UYVY10_2X10:
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case MEDIA_BUS_FMT_VYUY10_2X10:
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case MEDIA_BUS_FMT_YUYV10_2X10:
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case MEDIA_BUS_FMT_YVYU10_2X10:
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return MIPI_YUV422_10;
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case MEDIA_BUS_FMT_SBGGR8_1X8:
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case MEDIA_BUS_FMT_SGBRG8_1X8:
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case MEDIA_BUS_FMT_SGRBG8_1X8:
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case MEDIA_BUS_FMT_SRGGB8_1X8:
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return MIPI_RAW8;
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case MEDIA_BUS_FMT_SBGGR10_1X10:
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case MEDIA_BUS_FMT_SGBRG10_1X10:
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case MEDIA_BUS_FMT_SGRBG10_1X10:
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case MEDIA_BUS_FMT_SRGGB10_1X10:
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return MIPI_RAW10;
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case MEDIA_BUS_FMT_SBGGR12_1X12:
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case MEDIA_BUS_FMT_SGBRG12_1X12:
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case MEDIA_BUS_FMT_SGRBG12_1X12:
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case MEDIA_BUS_FMT_SRGGB12_1X12:
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return MIPI_RAW12;
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default:
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return MIPI_RAW8;
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}
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}
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static int __mcsi_pin_config(int id, int enable)
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{
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struct vin_mipi_gpio_info *mipi_gpio = &vin_mipi_gpio[id];
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int i;
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if (enable) {
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for (i = 0; i < 6; i++) {
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hal_gpio_pinmux_set_function(mipi_gpio->pin[i], mipi_gpio->pin_func[0]);
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}
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} else {
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for (i = 0; i < 6; i++) {
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hal_gpio_pinmux_set_function(mipi_gpio->pin[i], mipi_gpio->pin_func[1]);
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}
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}
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return 0;
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}
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static void cmb_phy_init(struct mipi_dev *mipi)
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{
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cmb_phy_lane_num_en(mipi->id + mipi->phy_offset, mipi->cmb_csi_cfg.phy_lane_cfg);
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cmb_phy0_work_mode(mipi->id + mipi->phy_offset, 0);
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cmb_phy0_ofscal_cfg(mipi->id + mipi->phy_offset);
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//cmb_phy_deskew_en(mipi->id + mipi->phy_offset, mipi->cmb_csi_cfg.phy_lane_cfg);
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cmb_term_ctl(mipi->id + mipi->phy_offset, mipi->cmb_csi_cfg.phy_lane_cfg);
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cmb_hs_ctl(mipi->id + mipi->phy_offset, mipi->cmb_csi_cfg.phy_lane_cfg);
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cmb_s2p_ctl(mipi->id + mipi->phy_offset, mipi->time_hs, mipi->cmb_csi_cfg.phy_lane_cfg);
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cmb_mipirx_ctl(mipi->id + mipi->phy_offset, mipi->cmb_csi_cfg.phy_lane_cfg);
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cmb_phy0_en(mipi->id + mipi->phy_offset, 1);
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cmb_phy_deskew1_cfg(mipi->id + mipi->phy_offset, mipi->deskew, mipi->cmb_mode == MIPI_VC_WDR_MODE ? true : false);
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}
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static void combo_csi_mipi_init(struct mipi_dev *mipi, unsigned int vinc_id)
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{
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int i;
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int isp_sel = global_video[vinc_id].isp_sel;
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_laneck_en = CK_1LANE;
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_mipi_lpck_en = LPCK_1LANE;
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_termck_en = TERMCK_CLOSE;
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_termdt_en = TERMDT_CLOSE;
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_s2p_en = S2PDT_CLOSE;
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_hsck_en = HSCK_CLOSE;
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_hsdt_en = HSDT_CLOSE;
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cmb_phy_init(mipi);
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/* V853 4lane needs cfg link mode */
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if (mipi->cmb_csi_cfg.phy_link_mode == ONE_4LANE) {
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mipi->cmb_csi_cfg.phy_lane_cfg.phy_mipi_lpck_en = LPCK_CLOSE;
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mipi->phy_offset = 1;
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cmb_phy_link_mode_set(ONE_4LANE);
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cmb_phy_init(mipi);
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mipi->phy_offset = 0;
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}
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for (i = 0; i < mipi->cmb_csi_cfg.lane_num; i++)
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mipi->cmb_csi_cfg.mipi_lane[i] = cmb_port_set_lane_map(mipi->id, i);
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for (i = 0; i < mipi->cmb_csi_cfg.total_rx_ch; i++) {
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if (global_sensors[mipi->id].sensor_core->sensor_g_format)
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mipi->cmb_csi_cfg.mipi_datatype[i] = get_pkt_fmt(global_sensors[mipi->id].sensor_core->sensor_g_format(mipi->id, isp_sel)->mbus_code);
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mipi->cmb_csi_cfg.vc[i] = i;
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}
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cmb_port_lane_num(mipi->id, mipi->cmb_csi_cfg.lane_num);
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cmb_port_out_num(mipi->id, mipi->cmb_csi_cfg.pix_num);
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if (mipi->cmb_mode == MIPI_DOL_WDR_MODE)
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cmb_port_out_chnum(mipi->id, 0);
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else
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cmb_port_out_chnum(mipi->id, mipi->cmb_csi_cfg.total_rx_ch - 1);
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cmb_port_lane_map(mipi->id, mipi->cmb_csi_cfg.mipi_lane);
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cmb_port_mipi_cfg(mipi->id, YUYV); //mipi->cmb_fmt->yuv_seq //no support yuv mipi sensor
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cmb_port_set_mipi_datatype(mipi->id, &mipi->cmb_csi_cfg);
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cmb_port_mipi_ch_trigger_en(mipi->id, 1);
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if (mipi->cmb_mode == MIPI_DOL_WDR_MODE)
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cmb_port_set_mipi_wdr(mipi->id, 0, 2);
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cmb_port_enable(mipi->id);
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}
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void combo_csi_init(struct mipi_dev *mipi, unsigned int vinc_id)
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{
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switch (mipi->if_type) {
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case V4L2_MBUS_PARALLEL:
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case V4L2_MBUS_BT656:
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break;
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case V4L2_MBUS_CSI2:
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combo_csi_mipi_init(mipi, vinc_id);
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break;
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case V4L2_MBUS_SUBLVDS:
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break;
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case V4L2_MBUS_HISPI:
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break;
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default:
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break;
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}
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}
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static int sunxi_mipi_top_s_stream(int on)
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{
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struct mipi_dev *mipi = global_mipi[0];
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if (on && (mipi->top_stream_count)++ > 0)
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return 0;
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else if (!on && (mipi->top_stream_count == 0 || --(mipi->stream_count) > 0))
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return 0;
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if (on) {
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cmb_phy_top_enable();
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} else {
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cmb_phy_top_disable();
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}
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return 0;
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}
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int sunxi_mipi_subdev_s_stream(unsigned int id, unsigned int vinc_id, int enable)
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{
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struct mipi_dev *mipi = global_mipi[id];
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int *stream_count;
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int i;
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stream_count = &mipi->stream_count;
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if (enable && (*stream_count)++ > 0)
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return 0;
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else if (!enable && (*stream_count == 0 || --(*stream_count) > 0))
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return 0;
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if (mipi->res->res_time_hs)
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mipi->time_hs = mipi->res->res_time_hs;
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else
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mipi->time_hs = 0x28;
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if (mipi->res->deskew)
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mipi->deskew = mipi->res->deskew;
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mipi->cmb_mode = mipi->res->res_combo_mode;
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if (mipi->cmb_csi_cfg.phy_link_mode == ONE_4LANE) {
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__mcsi_pin_config(mipi->id, enable);
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__mcsi_pin_config(mipi->id + 1, enable);
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} else
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__mcsi_pin_config(mipi->id, enable);
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sunxi_mipi_top_s_stream(enable);
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if (enable) {
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combo_csi_init(mipi, vinc_id);
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} else {
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mipi->cmb_csi_cfg.phy_link_mode = TWO_2LANE;
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mipi->cmb_csi_cfg.pix_num = ONE_DATA;
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cmb_port_disable(mipi->id);
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cmb_phy0_en(mipi->id, 0);
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}
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vin_log(VIN_LOG_FMT, "%s%d %s, lane_num %d\n",
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mipi->if_name, mipi->id, enable ? "stream on" : "stream off",
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mipi->cmb_csi_cfg.lane_num);
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return 0;
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}
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int sunxi_mipi_s_mbus_config(unsigned int id, const struct v4l2_mbus_config *cfg, const struct mbus_framefmt_res *res)
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{
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struct mipi_dev *mipi = global_mipi[id];
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#if 0
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if (cfg->type == V4L2_MBUS_CSI2) {
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mipi->if_type = V4L2_MBUS_CSI2;
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memcpy(mipi->if_name, "mipi", sizeof("mipi"));
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if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_4_LANE)) {
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mipi->csi2_cfg.lane_num = 4;
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mipi->cmb_cfg.lane_num = 4;
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mipi->cmb_cfg.mipi_ln = MIPI_4LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_3_LANE)) {
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mipi->csi2_cfg.lane_num = 3;
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mipi->cmb_cfg.lane_num = 3;
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mipi->cmb_cfg.mipi_ln = MIPI_3LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_2_LANE)) {
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mipi->csi2_cfg.lane_num = 2;
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mipi->cmb_cfg.lane_num = 2;
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mipi->cmb_cfg.mipi_ln = MIPI_2LANE;
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} else {
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mipi->cmb_cfg.lane_num = 1;
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mipi->csi2_cfg.lane_num = 1;
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mipi->cmb_cfg.mipi_ln = MIPI_1LANE;
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}
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} else if (cfg->type == V4L2_MBUS_SUBLVDS) {
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mipi->if_type = V4L2_MBUS_SUBLVDS;
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memcpy(mipi->if_name, "sublvds", sizeof("sublvds"));
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if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_12_LANE)) {
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mipi->cmb_cfg.lane_num = 12;
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mipi->cmb_cfg.lvds_ln = LVDS_12LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_10_LANE)) {
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mipi->cmb_cfg.lane_num = 10;
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mipi->cmb_cfg.lvds_ln = LVDS_10LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_8_LANE)) {
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mipi->cmb_cfg.lane_num = 8;
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mipi->cmb_cfg.lvds_ln = LVDS_8LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_4_LANE)) {
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mipi->cmb_cfg.lane_num = 4;
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mipi->cmb_cfg.lvds_ln = LVDS_4LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_2_LANE)) {
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mipi->cmb_cfg.lane_num = 2;
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mipi->cmb_cfg.lvds_ln = LVDS_2LANE;
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} else {
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mipi->cmb_cfg.lane_num = 8;
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mipi->cmb_cfg.lvds_ln = LVDS_8LANE;
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}
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} else if (cfg->type == V4L2_MBUS_HISPI) {
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mipi->if_type = V4L2_MBUS_HISPI;
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memcpy(mipi->if_name, "hispi", sizeof("hispi"));
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if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_12_LANE)) {
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mipi->cmb_cfg.lane_num = 12;
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mipi->cmb_cfg.lvds_ln = LVDS_12LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_10_LANE)) {
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mipi->cmb_cfg.lane_num = 10;
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mipi->cmb_cfg.lvds_ln = LVDS_10LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_8_LANE)) {
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mipi->cmb_cfg.lane_num = 8;
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mipi->cmb_cfg.lvds_ln = LVDS_8LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_4_LANE)) {
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mipi->cmb_cfg.lane_num = 4;
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mipi->cmb_cfg.lvds_ln = LVDS_4LANE;
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} else if (IS_FLAG(cfg->flags, V4L2_MBUS_SUBLVDS_2_LANE)) {
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mipi->cmb_cfg.lane_num = 2;
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mipi->cmb_cfg.lvds_ln = LVDS_2LANE;
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} else {
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mipi->cmb_cfg.lane_num = 4;
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mipi->cmb_cfg.lvds_ln = LVDS_4LANE;
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}
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} else {
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memcpy(mipi->if_name, "combo_parallel", sizeof("combo_parallel"));
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mipi->if_type = V4L2_MBUS_PARALLEL;
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}
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mipi->csi2_cfg.total_rx_ch = 0;
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if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_0)) {
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mipi->csi2_cfg.total_rx_ch++;
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}
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if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_1)) {
|
|
mipi->csi2_cfg.total_rx_ch++;
|
|
}
|
|
if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_2)) {
|
|
mipi->csi2_cfg.total_rx_ch++;
|
|
}
|
|
if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_3)) {
|
|
mipi->csi2_cfg.total_rx_ch++;
|
|
}
|
|
#else
|
|
if (cfg->type == V4L2_MBUS_CSI2) {
|
|
mipi->if_type = V4L2_MBUS_CSI2;
|
|
memcpy(mipi->if_name, "mipi", sizeof("mipi"));
|
|
if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_4_LANE)) {
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_lanedt_en = DT_4LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_mipi_lpdt_en = LPDT_4LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_deskew_en = DK_4LANE;
|
|
mipi->cmb_csi_cfg.lane_num = 4;
|
|
#if defined CONFIG_ARCH_SUN20IW3
|
|
mipi->cmb_csi_cfg.phy_link_mode = ONE_4LANE;
|
|
if (mipi->id)
|
|
vin_err("PORT1 supports a maximum of 2lane!\n");
|
|
#endif
|
|
} else if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_3_LANE)) {
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_lanedt_en = DT_3LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_mipi_lpdt_en = LPDT_3LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_deskew_en = DK_3LANE;
|
|
mipi->cmb_csi_cfg.lane_num = 3;
|
|
#if defined CONFIG_ARCH_SUN20IW3
|
|
mipi->cmb_csi_cfg.phy_link_mode = ONE_4LANE;
|
|
if (mipi->id)
|
|
vin_err("PORT1 supports a maximum of 2lane!\n");
|
|
#endif
|
|
} else if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_2_LANE)) {
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_lanedt_en = DT_2LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_mipi_lpdt_en = LPDT_2LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_deskew_en = DK_2LANE;
|
|
mipi->cmb_csi_cfg.lane_num = 2;
|
|
} else {
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_lanedt_en = DT_1LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_mipi_lpdt_en = LPDT_1LANE;
|
|
mipi->cmb_csi_cfg.phy_lane_cfg.phy_deskew_en = DK_1LANE;
|
|
mipi->cmb_csi_cfg.lane_num = 1;
|
|
}
|
|
}
|
|
|
|
mipi->cmb_csi_cfg.total_rx_ch = 0;
|
|
if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_0)) {
|
|
mipi->cmb_csi_cfg.total_rx_ch++;
|
|
}
|
|
if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_1)) {
|
|
mipi->cmb_csi_cfg.total_rx_ch++;
|
|
}
|
|
if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_2)) {
|
|
mipi->cmb_csi_cfg.total_rx_ch++;
|
|
}
|
|
if (IS_FLAG(cfg->flags, V4L2_MBUS_CSI2_CHANNEL_3)) {
|
|
mipi->cmb_csi_cfg.total_rx_ch++;
|
|
}
|
|
#endif
|
|
memcpy(mipi->res, res, sizeof(struct mbus_framefmt_res));
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mipi_probe(unsigned int id)
|
|
{
|
|
struct mipi_dev *mipi = NULL;
|
|
int ret = 0;
|
|
|
|
if (mipi_probe_flag[id])
|
|
return 0;
|
|
else
|
|
mipi_probe_flag[id] = true;
|
|
|
|
if (id > VIN_MAX_MIPI) {
|
|
vin_err("mipi%d is not existing, max is %d\n", id, VIN_MAX_MIPI);
|
|
return -1;
|
|
}
|
|
|
|
mipi = hal_malloc(sizeof(struct mipi_dev));
|
|
if (!mipi) {
|
|
vin_err("Fail to init MIPI dev!\n");
|
|
ret = -1;
|
|
goto ekzalloc;
|
|
}
|
|
memset(mipi, 0, sizeof(struct mipi_dev));
|
|
mipi->id = id;
|
|
|
|
mipi->res = hal_malloc(sizeof(struct mbus_framefmt_res));
|
|
if (!mipi->res) {
|
|
vin_err("Fail to init MIPI res!\n");
|
|
ret = -1;
|
|
goto freedev;
|
|
}
|
|
memset(mipi->res, 0, sizeof(struct mbus_framefmt_res));
|
|
|
|
mipi->base = sunxi_vin_get_mipi_base();
|
|
cmb_csi_set_top_base_addr((unsigned long)mipi->base);
|
|
vin_log(VIN_LOG_MD, "mipi%d reg is 0x%lx\n", mipi->id, mipi->base);
|
|
mipi->phy_base = sunxi_vin_get_mipiphy_base(mipi->id);
|
|
cmb_csi_set_phy_base_addr(mipi->id, (unsigned long)mipi->phy_base);
|
|
mipi->port_base = sunxi_vin_get_mipiport_base(mipi->id);
|
|
cmb_csi_set_port_base_addr(mipi->id, (unsigned long)mipi->port_base);
|
|
|
|
global_mipi[id] = mipi;
|
|
vin_log(VIN_LOG_MIPI, "mipi%d probe end!\n", mipi->id);
|
|
return 0;
|
|
|
|
freedev:
|
|
hal_free(mipi);
|
|
ekzalloc:
|
|
vin_err("mipi probe err!\n");
|
|
return ret;
|
|
}
|
|
|
|
int mipi_remove(unsigned int id)
|
|
{
|
|
struct mipi_dev *mipi = global_mipi[id];
|
|
|
|
if (!mipi_probe_flag[id])
|
|
return 0;
|
|
else
|
|
mipi_probe_flag[id] = false;
|
|
|
|
hal_free(mipi->res);
|
|
hal_free(mipi);
|
|
return 0;
|
|
}
|
|
|
|
|