96 lines
2.6 KiB
C
96 lines
2.6 KiB
C
/*
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* drivers/pwm/pwm-sunxi-new.h
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*
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* Allwinnertech pulse-width-modulation controller driver
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*
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* Copyright (C) 2018 AllWinner
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*
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __PWM_SUNXI_NEW__H__
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#define __PWM_SUNXI_NEW__H__
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#define PWM_PIER (0x0000)
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#define PWM_PISR (0x0004)
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#define PWM_CIER (0x0010)
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#define PWM_CISR (0x0014)
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#define PWM_PCCR01 (0x0020)
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#define PWM_PCCR23 (0x0024)
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#define PWM_PCCR45 (0x0028)
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#define PWM_PCCR67 (0x002c)
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#define PWM_PCCR89 (0x0030)
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#define PWM_PCCRAB (0x0034)
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#define PWM_PCCRCD (0x0038)
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#define PWM_PCCREF (0x003c)
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#define PCGR (0x0040)
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#define PWM_PDZCR01 (0x0060)
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#define PWM_PDZCR23 (0x0064)
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#define PWM_PDZCR45 (0x0068)
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#define PWM_PDZCR67 (0x006c)
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#define PWM_PDZCR89 (0x0070)
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#define PWM_PDZCRAB (0x0074)
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#define PWM_PDZCRCD (0x0078)
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#define PWM_PDZCREF (0x007c)
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#define PWM_PER (0x0080)
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#define PGR0 (0x0090)
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#define PGR1 (0x0094)
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#define PWM_CER (0x00c0)
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#define PWM_PCR_BASE (0x0100 + 0x0000)
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#define PWM_PPR_BASE (0x0100 + 0x0004)
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#define PWM_PCNTR_BASE (0x0100 + 0x0008)
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#define PPCNTP_BASE (0x0100 + 0x000c)
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#define PWM_CCR_BASE (0x0100 + 0x0010)
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#define PWM_CRLR_BASE (0x0100 + 0x0014)
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#define PWM_CFLR_BASE (0x0100 + 0x0018)
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/*#define PWM_PCCR8 (0x0300)*/
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#define PWMG_CS_SHIFT 0
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#define PWMG_CS_WIDTH 16
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#define PWMG_EN_SHIFT 16
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#define PWMG_START_SHIFT 17
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#define PWM_COUNTER_START_SHIFT 16
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#define PWM_COUNTER_START_WIDTH 16
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#define PWM_PUL_START_SHIFT 10
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#define PWM_PUL_START_WIDTH 1
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#define PWM_PUL_NUM_SHIFT 16
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#define PWM_PUL_NUM_WIDTH 16
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#define PWM_MODE_ACTS_SHIFT 8
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#define PWM_MODE_ACTS_WIDTH 2
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#define PWM_PCR_REG_OFFSET 0x20
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#define PWM_ACT_STA_SHIFT 0x8
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#define PWM_ACT_STA_WIDTH 0x1
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#define PWM_CLK_SRC_SHIFT 0x7
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#define PWM_CLK_SRC_WIDTH 0x2
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#define PWM_DIV_M_SHIFT 0x0
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#define PWM_DIV_M_WIDTH 0x4
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#define PWM_PRESCAL_SHIFT 0x0
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#define PWM_PRESCAL_WIDTH 0x8
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#define PWM_ACT_CYCLES_SHIFT 0x0
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#define PWM_ACT_CYCLES_WIDTH 0x10
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#define PWM_PERIOD_CYCLES_SHIFT 0x10
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#define PWM_PERIOD_CYCLES_WIDTH 0x10
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#define PWM_DZ_EN_SHIFT 0x0
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#define PWM_DZ_EN_WIDTH 0x1
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#define PWM_PDZINTV_SHIFT 0x8
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#define PWM_PDZINTV_WIDTH 0x8
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#define PWM_BYPASS_WIDTH 0x1
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#define PWM_CLK_GATING_SHIFT 0x4
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#define PWM_CLK_GATING_WIDTH 0x1
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#define PWM_PWM11_BYPASS_GATE 0x08000800
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#define PWM_CAPTURE_CRLF (0x1 << 0x4)
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#define PWM_CAPTURE_CFLF (0x1 << 0x3)
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#define PWM_CAPTURE_CRTE (0x1 << 0x2)
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#define PWM_CAPTURE_CFTE (0x1 << 0x1)
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#endif
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