67 lines
1.6 KiB
C
67 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration settings for the Allwinner A64 (sun50i) CPU
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* A64 specific configuration
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*/
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#define SUNXI_ARM_A53
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#ifdef CONFIG_SUNXI_UBIFS
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#define CONFIG_AW_MTD_SPINAND 1
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#define CONFIG_AW_SPINAND_PHYSICAL_LAYER 1
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#define CONFIG_AW_SPINAND_NONSTANDARD_SPI_DRIVER 1
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#define CONFIG_AW_SPINAND_PSTORE_MTD_PART 0
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#define CONFIG_AW_MTD_SPINAND_UBOOT_BLKS 24
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#define CONFIG_AW_SPINAND_ENABLE_PHY_CRC16 0
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_UBIFS
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#define CONFIG_MTD_UBI_WL_THRESHOLD 4096
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#define CONFIG_MTD_UBI_BEB_LIMIT 40
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#define CONFIG_CMD_UBI
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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/* Nand config */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x00
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/* simulate ubi solution offline burn */
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/* #define CONFIG_UBI_OFFLINE_BURN */
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#endif
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#ifdef CONFIG_USB_EHCI_HCD
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#define CONFIG_USB_EHCI_SUNXI
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#define CONFIG_SUNXI_USB_PHYS 1
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#define GICD_BASE 0x3021000
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#define GICC_BASE 0x3022000
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/* sram layout*/
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#define SUNXI_SRAM_A2_BASE (0x104000L)
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#define SUNXI_SRAM_A2_SIZE (0x01C000)
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/*sram may already used by scp(depends on when scp is loaded)*/
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/*use dram for early init instaed*/
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#define SUNXI_SYS_SRAM_BASE 0x48200000 /* first MB of tee shm */
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#define SUNXI_SYS_SRAM_SIZE 0x100000
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#define CONFIG_SYS_BOOTM_LEN 0x2000000
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#define PHOENIX_PRIV_DATA_ADDR (SUNXI_SRAM_A2_BASE + 0x1d500)
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/* #define FPGA_PLATFORM */
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/*
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* Include common sunxi configuration where most the settings are
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*/
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#include <configs/sunxi-common.h>
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#endif /* __CONFIG_H */
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