110 lines
3.5 KiB
C
110 lines
3.5 KiB
C
/*
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* include/boot_param.h
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*
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* Copyright (c) 2021-2025 Allwinnertech Co., Ltd.
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* Author: lujianliang <lujianliang@allwinnertech.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __BOOT_PARAM_H
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#define __BOOT_PARAM_H
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#include <linux/mtd/spi-nor.h>
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#define BOOT_PARAM_MAGIC "bootpara"
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#define BOOT_PARAM_SIZE 4096
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#define CHECK_SUM 0x5F0A6C39
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#define CONFIG_SPINOR_UBOOT_OFFSET 128 /* sectors */
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struct sunxi_boot_parameter_header {
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u8 magic[8]; //bootpara
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u32 version; // describe the region version
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u32 check_sum;
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u32 length;
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u8 reserved[12];
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};
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//---total len 是4K
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struct sunxi_boot_param_region {
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struct sunxi_boot_parameter_header header;//32
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char sdmmc_info[256];
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char nand_info[256];
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char spiflash_info[256];
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char ddr_info[512];
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u8 reserved[2784];// = 4096 - sdmmc_size - nand_size - spi_size - ddr_size - 32
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};
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#define SPINOR_BOOT_PARAM_MAGIC "NORPARAM"
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typedef struct {
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u8 magic[8];
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__s32 readcmd;
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__s32 read_mode;
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__s32 write_mode;
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__s32 flash_size;
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__s32 addr4b_opcodes;
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__s32 erase_size;
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__s32 delay_cycle;/*When the frequency is greater than 60MHZ configured as 1;less than 24MHZ configured as 2;greater 24MHZ and less 60HZ as 3*/
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__s32 lock_flag;
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__s32 frequency;
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unsigned int sample_delay;
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unsigned int sample_mode;
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enum spi_nor_protocol read_proto;
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enum spi_nor_protocol write_proto;
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u8 read_dummy;
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} boot_spinor_info_t;
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/******************************************************************************/
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/* head of Boot0 */
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/******************************************************************************/
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#define BOOT0_MAGIC "eGON.BT0"
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typedef struct _normal_gpio_cfg {
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unsigned char port;
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unsigned char port_num;
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char mul_sel;
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char pull;
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char drv_level;
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char data;
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unsigned char reserved[2];
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} normal_gpio_cfg;
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typedef struct _boot0_private_head_t {
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unsigned int prvt_head_size;
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char prvt_head_vsn[4]; /* the version of boot0_private_head_t */
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unsigned int dram_para[32]; /* Original values is arbitrary */
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int uart_port;
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normal_gpio_cfg uart_ctrl[2];
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int enable_jtag; /* 1 : enable, 0 : disable */
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normal_gpio_cfg jtag_gpio[5];
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normal_gpio_cfg storage_gpio[32];
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char storage_data[512 - sizeof(normal_gpio_cfg) * 32];
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}
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boot0_private_head_t;
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typedef struct standard_Boot_file_head {
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unsigned int jump_instruction; /* one intruction jumping to real code */
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unsigned char magic[8]; /* ="eGON.BT0" or "eGON.BT1", not C-style string */
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unsigned int check_sum; /* generated by PC */
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unsigned int length; /* generated by PC */
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unsigned int pub_head_size; /* size of boot_file_head_t */
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unsigned char pub_head_vsn[4]; /* version of boot_file_head_t */
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unsigned char file_head_vsn[4]; /* version of boot0_file_head_t or boot1_file_head_t */
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unsigned char Boot_vsn[4]; /* Boot version */
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unsigned char eGON_vsn[4]; /* eGON version */
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unsigned char platform[8]; /* platform information */
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} standard_boot_file_head_t;
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typedef struct _boot0_file_head_t {
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standard_boot_file_head_t boot_head;
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boot0_private_head_t prvt_head;
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} boot0_file_head_t;
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#endif
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