56 lines
1.7 KiB
C
56 lines
1.7 KiB
C
/*
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* (C) Copyright 2013-2016
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*
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*/
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#ifndef __EFUSE_H__
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#define __EFUSE_H__
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#include <arch/cpu.h>
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#define SID_PRCTL (SUNXI_SID_BASE + 0x40)
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#define SID_PRKEY (SUNXI_SID_BASE + 0x50)
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#define SID_RDKEY (SUNXI_SID_BASE + 0x60)
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#define SJTAG_AT0 (SUNXI_SID_BASE + 0x80)
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#define SJTAG_AT1 (SUNXI_SID_BASE + 0x84)
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#define SJTAG_S (SUNXI_SID_BASE + 0x88)
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#define SID_EFUSE (SUNXI_SID_BASE + 0x200)
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#define SID_SECURE_MODE (SUNXI_SID_BASE + 0xA0)
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#define SID_OP_LOCK (0xAC)
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#define EFUSE_CHIPD (0x00)/* 128 bits */
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#define EFUSE_BROM_CONFIG (0x10)/* 16 bits config, 16 bits try */
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#define EFUSE_THERMAL_SENSOR (0x14)/* 64 bits */
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#define EFUSE_TF_ZONE (0x1C)/* 128 bits */
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#define EFUSE_OEM_PROGRAM (0x2C)/* 128bits :tvout 32+reserv 96 */
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#define EFUSE_WRITE_PROTECT (0x30)/* 32 bits */
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#define EFUSE_READ_PROTECT (0x34)/* 32 bits */
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#define EFUSE_LCJS (0x38)/* 32 bits */
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#define EFUSE_ATTR (0x3C)/* 32 bits */
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#define EFUSE_ROTPK (0x40)/* 256 bits */
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#define EFUSE_SSK (0x60)/* 128 bits */
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#define EFUSE_NV1 (0x70)/* 32 bits */
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#define EFUSE_NV2 (0x74)/* 32 bits */
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#define EFUSE_OEM_PROGRAM_SECURE (0x78)/* 64 bits */
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/* size (bit) */
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#define SID_CHIPID_SIZE (128)
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#define SID_THERMAL_SIZE (64)
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#define SID_OEM_PROGRAM_SIZE (32)
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#define SID_NV1_SIZE (32)
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#define SID_NV2_SIZE (32)
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#define SID_ROTPK_SIZE (256)
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#define SID_SSK_SIZE (128)
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#define SID_OEM_PROGRAM_SECURE_SIZE (64)
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uint sid_read_key(uint key_index);
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void sid_program_key(uint key_index, uint key_value);
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void sid_set_security_mode(void);
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int sid_probe_security_mode(void);
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int sid_get_security_status(void);
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#endif /* #ifndef __EFUSE_H__ */
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