481 lines
11 KiB
Plaintext
Executable File
481 lines
11 KiB
Plaintext
Executable File
/*
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* Allwinner Technology CO., Ltd. sun50iw10p1 platform
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*
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* modify base on juno.dts
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*/
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "sun55iw3p1-clk.dtsi"
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/*#include "sun50iw10p1-pinctrl.dtsi"*/
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#include <dt-bindings/thermal/thermal.h>
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/ {
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model = "sun55iw3";
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compatible = "allwinner,a523", "arm,sun55iw3p1";
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#address-cells = <2>;
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#size-cells = <2>;
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soc: soc@29000000 {
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#address-cells = <2>;
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#size-cells = <2>;
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power_sply:power_sply@4500000c {
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device_type = "power_sply";
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};
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power_delay:power_delay@4500024 {
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device_type = "power_delay";
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};
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platform:platform@45000004 {
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device_type = "platform";
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};
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target:target@45000008 {
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device_type = "target";
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};
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charger0:charger0@45000010 {
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device_type = "charger0";
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};
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card_boot:card_boot@45000014 {
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device_type = "card_boot";
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logical_start = <40960>;
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/* sprite_gpio0 = <&pio PH 6 1 0xffffffff 0xffffffff 1>; */
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sprite_gpio0 = <&pio 0x7 0x6 0x1 0xffffffff 0xffffffff 0x1>;
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};
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gpio_bias:gpio_bias@45000018 {
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device_type = "gpio_bias";
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};
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fastboot_key:fastboot_key@4500001c {
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device_type = "fastboot_key";
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key_max = <42>;
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key_min = <38>;
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};
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recovery_key:recovery_key@45000020 {
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device_type = "recovery_key";
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key_max = <31>;
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key_min = <28>;
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};
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pio: pinctrl@0300b000 {
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compatible = "allwinner,sun55iw3p1-pinctrl";
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device_type = "pio";
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gpio-controller;
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#size-cells = <0>;
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#gpio-cells = <6>;
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/* takes the debounce time in usec as argument */
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input-debounce = <0 0 0 0 0 0 0 0 0>;
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r_pio: pinctrl@07022000 {
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s_twi0_pins_a: s_twi0@0 {
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allwinner,pins = "PL0", "PL1";
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allwinner,pname = "s_twi0_scl", "s_twi0_sda";
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allwinner,function = "s_twi0";
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allwinner,muxsel = <2>;
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allwinner,drive = <1>;
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allwinner,pull = <1>;
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};
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s_twi0_pins_b: s_twi0@1 {
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allwinner,pins = "PL0", "PL1";
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allwinner,function = "gpio_out";
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allwinner,muxsel = <1>;
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allwinner,drive = <1>;
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allwinner,pull = <1>;
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};
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};
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sdc0_pins_a: sdc0@0 {
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};
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sdc0_pins_b: sdc0@1 {
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};
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sdc0_pins_c: sdc0@2 {
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};
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sdc2_pins_a: sdc2@0 {
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};
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sdc2_pins_b: sdc2@1 {
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};
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sdc2_pins_c: sdc2@2 {
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};
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nand0_pins_a: nand0@0 {
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};
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nand0_pins_b: nand0@1 {
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};
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nand0_pins_c: nand0@2 {
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};
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spi0_pins_a: spi0@0 {
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};
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spi0_pins_b: spi0@1 {
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};
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spi0_pins_c: spi0@2 {
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};
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spif_pins_a: spif@0 {
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};
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spif_pins_b: spif@1 {
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};
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spif_pins_c: spif@2 {
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};
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twi6: s_twi@0x07081400 {
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pmu0: pmu@34 {
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};
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};
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lvds0_pins_a: lvds0@0 {
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};
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lvds0_pins_b: lvds0@1 {
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};
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lvds1_pins_a: lvds1@0 {
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};
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lvds1_pins_b: lvds1@1 {
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};
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lvds2_pins_a: lvds2@0 {
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};
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lvds2_pins_b: lvds2@1 {
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};
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lvds3_pins_a: lvds3@0 {
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};
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lvds3_pins_b: lvds3@1 {
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};
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lcd1_lvds2link_pins_a: lcd1_lvds2link@0 {
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};
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lcd1_lvds2link_pins_b: lcd1_lvds2link@1 {
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};
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lvds2link_pins_a: lvds2link@0 {
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};
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lvds2link_pins_b: lvds2link@1 {
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};
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rgb24_pins_a: rgb24@0 {
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};
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rgb24_pins_b: rgb24@1 {
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};
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rgb18_pins_a: rgb18@0 {
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};
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rgb18_pins_b: rgb18@1 {
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};
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eink_pins_a: eink@0 {
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};
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eink_pins_b: eink@1 {
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};
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dsi4lane_pins_a: dsi4lane@0{
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}; /* avoid compile err */
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dsi4lane_pins_b: dsi4lane@1{
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}; /* avoid compile err */
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dsi0_4lane_pins_a: dsi0_4lane@0 {
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};
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dsi0_4lane_pins_b: dsi0_4lane@1 {
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};
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dsi1_4lane_pins_a: dsi1_4lane@0 {
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};
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dsi1_4lane_pins_b: dsi1_4lane@1 {
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};
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pwm0_pin_a: pwm0@0 {
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};
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pwm0_pin_b: pwm0@1 {
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};
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pwm1_pin_a: pwm1@0 {
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};
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pwm1_pin_b: pwm1@1 {
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};
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};
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pwm: pwm@2000c00 {
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#pwm-cells = <0x3>;
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compatible = "allwinner,sunxi-pwm";
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reg = <0x0 0x02000c00 0x0 0x3ff>;
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pwm-number = <16>;
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pwm-base = <0x0>;
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sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>, <&pwm3>, <&pwm4>,
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<&pwm5>, <&pwm6>, <&pwm7>, <&pwm8>, <&pwm9>,
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<&pwm10>, <&pwm11>, <&pwm12>, <&pwm13>,
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<&pwm14>, <&pwm15>;
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};
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pwm0: pwm0@2000c10 {
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compatible = "allwinner,sunxi-pwm0";
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reg = <0x0 0x02000c10 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm1: pwm1@2000c11 {
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compatible = "allwinner,sunxi-pwm1";
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reg = <0x0 0x02000c11 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm2: pwm2@2000c12 {
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compatible = "allwinner,sunxi-pwm2";
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reg = <0x0 0x02000c12 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm3: pwm3@2000c13 {
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compatible = "allwinner,sunxi-pwm3";
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reg = <0x0 0x02000c13 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm4: pwm4@2000c14 {
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compatible = "allwinner,sunxi-pwm4";
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reg = <0x0 0x02000c14 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm5: pwm5@2000c15 {
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compatible = "allwinner,sunxi-pwm5";
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reg = <0x0 0x02000c15 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm6: pwm6@2000c16 {
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compatible = "allwinner,sunxi-pwm6";
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reg = <0x0 0x02000c16 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm7: pwm7@2000c17 {
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compatible = "allwinner,sunxi-pwm7";
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reg = <0x0 0x02000c17 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm8: pwm8@2000c18 {
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compatible = "allwinner,sunxi-pwm8";
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reg = <0x0 0x02000c18 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm9: pwm9@2000c19 {
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compatible = "allwinner,sunxi-pwm9";
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reg = <0x0 0x02000c19 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm10: pwm10@2000c1a {
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compatible = "allwinner,sunxi-pwm10";
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reg = <0x0 0x02000c1a 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm11: pwm11@2000c1b {
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compatible = "allwinner,sunxi-pwm11";
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reg = <0x0 0x02000c1b 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm12: pwm12@2000c1c {
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compatible = "allwinner,sunxi-pwm12";
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reg = <0x0 0x02000c1c 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm13: pwm13@2000c1d {
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compatible = "allwinner,sunxi-pwm13";
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reg = <0x0 0x02000c1d 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm14: pwm14@2000c1e {
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compatible = "allwinner,sunxi-pwm14";
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reg = <0x0 0x02000c1e 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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pwm15: pwm15@2000c1f {
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compatible = "allwinner,sunxi-pwm15";
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reg = <0x0 0x02000c1f 0x0 0x4>;
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reg_base = <0x02000c00>;
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status = "disabled";
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};
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card0_boot_para:card0_boot_para@2 {
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device_type = "card0_boot_para";
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};
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card2_boot_para:card2_boot_para@3 {
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device_type = "card2_boot_para";
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};
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nand0:nand0@04011000 {
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device_type = "nand0";
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};
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spi0: spi@4025000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "allwinner,sun55i-spi";
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device_type = "spi0";
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reg = <0x0 0x04025000 0x0 0x300>;
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//interrupts-extended = <&plic0 31 IRQ_TYPE_LEVEL_HIGH>;
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//clocks = <&ccu CLK_PLL_PERIPH0>, <&ccu CLK_SPI0>, <&ccu CLK_BUS_SPI0>;
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//clock-names = "pll", "mod", "bus";
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//resets = <&ccu RST_BUS_SPI0>;
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};
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spif: spif@4f00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "allwinner,sun55i-spif";
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device_type = "spif";
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reg = <0x0 0x047f0000 0x0 0x1000>;
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//interrupts-extended = <&plic0 19 IRQ_TYPE_LEVEL_HIGH>;
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//clocks = <&ccu CLK_PLL_PERIPH0>, <&ccu CLK_SPIF>, <&ccu CLK_BUS_SPIF>;
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//clock-names = "pll", "mod", "bus";
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//resets = <&ccu RST_BUS_SPIF>;
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};
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disp: disp@5000000 {
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compatible = "allwinner,sunxi-disp";
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reg = <0x0 0x05000000 0x0 0x400000>, /*de*/
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<0x0 0x05500000 0x0 0x1000>, /* display_if_top */
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<0x0 0x05501000 0x0 0x1000>, /* tcon_lcd0 */
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<0x0 0x05502000 0x0 0x1000>, /* tcon_lcd1 */
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<0x0 0x05731000 0x0 0x1000>, /* tcon_lcd2 */
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<0x0 0x05503000 0x0 0x1000>, /* tcon_tv0 */
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<0x0 0x05504000 0x0 0x1000>, /* tcon_tv1 */
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<0x0 0x05506000 0x0 0x1fff>, /* dsi0 */
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<0x0 0x05508000 0x0 0x1fff>; /* dsi1 */
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interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* DE */
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<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* tcon_lcd0 */
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<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, /* tcon_lcd1 */
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<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, /* tcon_lcd2 */
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<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, /* tcon_tv0 */
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<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* tcon_tv1 */
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<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, /* dsi0 */
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<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; /* dsi1 */
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clocks = <&clk_de0>,
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// <&clk_de1>,
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<&clk_dpss_top0>,
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<&clk_tcon_lcd0>, /* tcon lcd */
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<&clk_tcon_lcd1>,
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<&clk_tcon_lcd2>,
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// <&clk_tcon_tv0>, /* tcon tv */
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// <&clk_tcon_tv1>,
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<&clk_tcon_lcd1>,
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<&clk_tcon_lcd2>,
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<&clk_lvds0>,
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<&clk_lvds1>,
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<&clk_mipi_dsi0>,
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<&clk_mipi_dsi1>,
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<&clk_mipi_dsi_combphy0>,
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<&clk_mipi_dsi_combphy1>;
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// interrupt-parent = <&gic>;
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boot_disp = <0>;
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boot_disp1 = <0>;
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boot_disp2 = <0>;
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fb_base = <0>;
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status = "okay";
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};
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lcd0: lcd0@1c0c000 {
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// #address-cells = <2>;
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// #size-cells = <2>;
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compatible = "allwinner,sunxi-lcd0";
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// reg = <0x0 0x1c0c000 0x0 0x0>; /* Fake registers to avoid dtc compiling warnings */
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pinctrl-names = "active","sleep";
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status = "okay";
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};
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lcd0_1: lcd0_1@1c0c000 {
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};
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lcd1: lcd1@0 {
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compatible = "allwinner,sunxi-lcd1";
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// reg = <0x0 0x1c0c000 0x0 0x0>; /* Fake registers to avoid dtc compiling warnings */
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pinctrl-names = "active","sleep";
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status = "okay";
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};
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lcd1_1: lcd1_1@1 {
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};
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lcd1_2: lcd1_2@2 {
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};
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lcd2: lcd2@1c0c000 {
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compatible = "allwinner,sunxi-lcd2";
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/* Fake registers to avoid dtc compiling warnings */
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// reg = <0x0 0x1c0c000 0x0 0x0>;
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pinctrl-names = "active","sleep";
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status = "okay";
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};
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eink: eink@6400000 {
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compatible = "allwinner,sunxi-eink";
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pinctrl-names = "active","sleep";
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reg = <0x0 0x06400000 0x0 0x01ffff>,/* eink */
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<0x0 0x06000000 0x0 0x3fffff>;/* de */
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* eink */
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<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; /* de */
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clocks = <&clk_de0>,
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<&clk_ee>,
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<&clk_panel>;
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/* iommus = <&mmu_aw 6 1>; */
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interrupt-parent = <&gic>;
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status = "okay";
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};
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clk_test: clk_test@0x12345 {
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clocks = <&clk_sdmmc0_mod>,
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<&clk_sdmmc0_rst>,
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<&clk_sdmmc0_bus>,
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<&clk_sdmmc2_mod>,
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<&clk_sdmmc2_rst>,
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<&clk_sdmmc2_bus>;
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status = "okay";
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};
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};
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gic: interrupt-controller@3020000 {
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compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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device_type = "gic";
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interrupt-controller;
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reg = <0x0 0x03021000 0 0x1000>, /* GIC Dist */
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<0x0 0x03022000 0 0x2000>, /* GIC CPU */
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<0x0 0x03024000 0 0x2000>, /* GIC VCPU Control */
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<0x0 0x03026000 0 0x2000>; /* GIC VCPU */
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interrupts = <GIC_PPI 9 0xf04>; /* GIC Maintenence IRQ */
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interrupt-parent = <&gic>;
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};
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aliases:aliases@45100000 {
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};
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};
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#include ".board-uboot.dts"
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