242 lines
9.2 KiB
C
Executable File
242 lines
9.2 KiB
C
Executable File
/**
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* @file hal_lpuart.h
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* @author XRADIO IOT WLAN Team
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*/
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/*
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* Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DRIVER_CHIP_HAL_LPUART_H_
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#define _DRIVER_CHIP_HAL_LPUART_H_
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#include "driver/chip/hal_def.h"
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#include "driver/chip/hal_dma.h"
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#include "driver/chip/hal_prcm.h"
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#include "driver/chip/hal_uart.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief LPUART ID definition
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*/
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typedef enum {
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LPUART0_ID = 0U,
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LPUART1_ID,
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LPUART_NUM,
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LPUART_INVALID_ID = 0xFFU
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} LPUART_ID;
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/**
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* @brief LPUART register block structure
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*/
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typedef struct {
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__IO uint32_t CTRL; /* offset: 0x00, LPUART control register */
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__IO uint32_t BAUD_CFG; /* offset: 0x04, LPUART baudrate config register */
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uint32_t RESERVED1[2];
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__IO uint32_t RX_CFG; /* offset: 0x10, LPUART RX config register */
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__I uint32_t RX_DATA; /* offset: 0x14, LPUART RX data register */
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uint32_t RESERVED2[2];
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__IO uint32_t IRQ_EN; /* offset: 0x20, LPUART interrupt enable register */
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__I uint32_t IRQ_S; /* offset: 0x24, LPUART interrupt status register */
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__IO uint32_t IRQ_CLR; /* offset: 0x28, LPUART interrupt clear register */
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__IO uint32_t RX_CMP1; /* offset: 0x2C, LPUART RX compare_1 register */
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__IO uint32_t RX_CMP2; /* offset: 0x30, LPUART RX compare_2 register */
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} LPUART_T;
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#define LPUART0 ((LPUART_T *)LPUART0_BASE) /* address: 0x40045800 */
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#define LPUART1 ((LPUART_T *)LPUART1_BASE) /* address: 0x40045C00 */
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/* LPUART->MODEM_CTRL, R/W */
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#define LPUART_CFG_SOFT_RST_BIT HAL_BIT(8)
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/* LPUART->BAUD_CFG, R/W */
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#define LPUART_DIV_MASK 0xFFU
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#define LPUART_QUOT_MASK 0xFFFFU
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#define LPUART_CFG_DIVISOR_POS 24
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#define LPUART_CFG_REMAINDER_POS 16
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#define LPUART_CFG_QUOTIENT_POS 0
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/* LPUART->RX_CFG, R/W */
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#define LPUART_CFG_MSB_FIRST_SHIFT 12
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#define LPUART_CFG_MSB_FIRST_MASK (0x1U << LPUART_CFG_MSB_FIRST_SHIFT)
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#define LPUART_DATA_WIDTH_SHIFT 8
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#define LPUART_DATA_WIDTH_MASK (0x7U << LPUART_DATA_WIDTH_SHIFT)
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typedef enum {
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LPUART_DATA_WIDTH_4 = (0x0U << LPUART_DATA_WIDTH_SHIFT),
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LPUART_DATA_WIDTH_5 = (0x1U << LPUART_DATA_WIDTH_SHIFT),
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LPUART_DATA_WIDTH_6 = (0x2U << LPUART_DATA_WIDTH_SHIFT),
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LPUART_DATA_WIDTH_7 = (0x3U << LPUART_DATA_WIDTH_SHIFT),
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LPUART_DATA_WIDTH_8 = (0x4U << LPUART_DATA_WIDTH_SHIFT),
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LPUART_DATA_WIDTH_9 = (0x5U << LPUART_DATA_WIDTH_SHIFT)
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} LPUART_Data_Width;
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#define LPUART_PARITY_SEL_SHIFT 4
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#define LPUART_PARITY_SEL_MASK (0x7U << LPUART_PARITY_SEL_SHIFT)
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typedef enum {
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LPUART_PARITY_NONE = 0U,
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LPUART_PARITY_EVEN = (0x1U << LPUART_PARITY_SEL_SHIFT),
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LPUART_PARITY_ODD = (0x2U << LPUART_PARITY_SEL_SHIFT),
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LPUART_PARITY_SPACE = (0x3U << LPUART_PARITY_SEL_SHIFT), /* the parity bit always present 0 */
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LPUART_PARITY_MARK = (0x4U << LPUART_PARITY_SEL_SHIFT) /* the parity bit always present 1 */
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} LPUART_Parity;
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#define LPUART_RPE_RPT HAL_BIT(2)
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#define LPUART_RX_EN HAL_BIT(0)
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/* LPUART->RX_DATA, R/W */
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#define LPUART_RX_DATA_MASK 0x1FFU
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/* LPUART->IRQ_EN, R/W */
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#define LPUART_RX_DATA_EN_BIT HAL_BIT(9)
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#define LPUART_RX_DATA_CMP_EN_BIT HAL_BIT(7)
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/* LPUART->IRQ_S, R */
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#define LPUART_IRQ_FLAG_MASK 0x280U
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#define LPUART_RX_DATA_FLAG_BIT HAL_BIT(9)
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#define LPUART_RX_DATA_CMP_FLAG_BIT HAL_BIT(7)
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/* LPUART->IRQ_CLR, W */
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#define LPUART_RX_DATA_CLR_BIT HAL_BIT(9)
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#define LPUART_RX_DATA_CMP_CLR_BIT HAL_BIT(7)
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/* LPUART->RX_CMP1,LPUART->RX_CMP2 R/W */
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#define LPUART_RX_CMP_LEN_MASK 0x7U
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#define LPUART_RX_CMP_LEN_SHIFT 0
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#define LPUART_RX_CMP_DATA_MASK 0x1FFU
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#define LPUART_RX_CMP_DATA0_POS 3
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#define LPUART_RX_CMP_DATA1_POS 12
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#define LPUART_RX_CMP_DATA2_POS 21
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#define LPUART_RX_CMP_DATA3_POS 3
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#define LPUART_RX_CMP_DATA4_POS 12
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typedef enum {
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LPUART_RX_CMP_DATA_NUM_1 = 1,
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LPUART_RX_CMP_DATA_NUM_2,
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LPUART_RX_CMP_DATA_NUM_3,
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LPUART_RX_CMP_DATA_NUM_4,
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LPUART_RX_CMP_DATA_NUM_5,
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LPUART_RX_CMP_DATA_NUM_MAX = 5,
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} LPUART_RX_CMP_DATA_NUM;
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/**
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* @brief LPUART initialization parameters
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*/
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typedef struct {
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uint32_t baudRate; /* Baud rate, in bps */
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uint32_t msbFirst; /* tx msb first */
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PRCM_LPUART_WAKEUP_IN_SEL input_uart; /* select which uart as input */
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LPUART_Parity parity; /* Parity */
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LPUART_Data_Width dataWidth; /* Data width */
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} LPUART_InitParam;
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/** @brief Type define of LPUART receive compare callback function */
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typedef void (*LPUART_RxCmpCallback)(void *arg);
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/* Exported functions --------------------------------------------------------*/
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/**
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* @brief Initialize the LPUART according to the specified parameters
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* @param[in] param Pointer to LPUART_InitParam structure
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* @retval HAL_Status, HAL_OK on success
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*/
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HAL_Status HAL_LPUART_Init(LPUART_ID lpuartID, const LPUART_InitParam *param);
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/**
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* @brief DeInitialize the specified LPUART
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* @param[in] lpuartID ID of the specified LPUART
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* @retval HAL_Status, HAL_OK on success
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*/
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HAL_Status HAL_LPUART_DeInit(LPUART_ID lpuartID);
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/**
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* @brief Receive an amount of data in interrupt mode
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* @param[in] lpuartID ID of the specified LPUART
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* @param[out] buf Pointer to the data buffer
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* @param[in] size The maximum number of bytes to be received.
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* The actual received bytes can be less than this.
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* @param[in] msec Timeout value in millisecond to receive data.
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* HAL_WAIT_FOREVER for no timeout.
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* @return Number of bytes received, -1 on error
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*
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* @note This function is not thread safe. If using the LPUART receive series
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* functions in multi-thread, make sure they are executed exclusively.
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*/
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int32_t HAL_LPUART_Receive_IT(LPUART_ID lpuartID, uint8_t *buf, int32_t size, uint32_t msec);
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/**
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* @brief setup rx data compare function
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* @param[in] lpuartID ID of the specified LPUART
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* @param[in] cmp_len the length of compare data
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* @param[in] cmp_data buffer point to compare data
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* @retval HAL_Status, HAL_OK on success
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*
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* @note
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*/
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HAL_Status HAL_LPUART_EnableRxCmp(LPUART_ID lpuartID, uint8_t cmp_len, uint8_t *cmp_data);
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/**
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* @brief Enable receive compare callback function for the specified LPUART
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* @param[in] cb The LPUART receive ready callback function
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* @param[in] arg Argument of the LPUART receive ready callback function
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* @retval HAL_Status, HAL_OK on success
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*
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* @note To handle receive data externally, use this function to enable the
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* receive ready callback function, then receive and process the data in
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* the callback function.
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* @note If the receive ready callback function is enabled, all other receive
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* series functions cannot be used to receive data.
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* @note This function is not thread safe. If using the LPUART receive series
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* functions in multi-thread, make sure they are executed exclusively.
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*/
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HAL_Status HAL_LPUART_EnableRxCmpCallback(LPUART_ID lpuartID, LPUART_RxCmpCallback cb, void *arg);
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/**
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* @brief Disable receive compare callback function for the specified LPUART
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* @param[in] lpuartID ID of the specified LPUART
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* @retval HAL_Status, HAL_OK on success
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*/
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HAL_Status HAL_LPUART_DisableRxCmpCallback(LPUART_ID lpuartID);
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/**
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* @brief Set PM mode to be bypassed
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* @param[in] lpuartID ID of the specified LPUART
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* @param[in] mode Bit mask of PM mode to be bypassed
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* @retval HAL_Status, HAL_OK on success
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*/
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HAL_Status HAL_LPUART_SetBypassPmMode(LPUART_ID lpuartID, uint8_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DRIVER_CHIP_HAL_LPUART_H_ */
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