163 lines
5.5 KiB
C
Executable File
163 lines
5.5 KiB
C
Executable File
/*
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* Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DRIVER_CHIP_HAL_MBOX_H_
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#define _DRIVER_CHIP_HAL_MBOX_H_
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#include "driver/chip/hal_def.h"
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#include "driver/chip/hal_global.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* queue index */
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typedef enum {
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MBOX_QUEUE_0 = 0,
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MBOX_QUEUE_1 = 1,
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MBOX_QUEUE_2 = 2,
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MBOX_QUEUE_3 = 3,
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MBOX_QUEUE_4 = 4,
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MBOX_QUEUE_5 = 5,
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MBOX_QUEUE_6 = 6,
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MBOX_QUEUE_7 = 7,
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MBOX_QUEUE_NUM = 8
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} MBOX_Queue;
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typedef struct {
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__IO uint32_t CTRL[2]; /* offset: 0x0000 */
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uint32_t RESERVED0[14];
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__IO uint32_t IRQ0_EN; /* offset: 0x0040 */
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uint32_t RESERVED1[3];
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__IO uint32_t IRQ0_STATUS; /* offset: 0x0050 */
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uint32_t RESERVED2[3];
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__IO uint32_t IRQ1_EN; /* offset: 0x0060 */
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uint32_t RESERVED3[3];
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__IO uint32_t IRQ1_STATUS; /* offset: 0x0070 */
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uint32_t RESERVED4[35];
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__I uint32_t FIFO_STATUS[MBOX_QUEUE_NUM]; /* offset: 0x0100 */
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uint32_t RESERVED5[8];
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__I uint32_t MSG_STATUS[MBOX_QUEUE_NUM]; /* offset: 0x0140 */
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uint32_t RESERVED6[8];
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__IO uint32_t MSG[MBOX_QUEUE_NUM]; /* offset: 0x0180 */
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uint32_t RESERVED7[8];
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__IO uint32_t DEBUG; /* offset: 0x01C0 */
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} MBOX_T;
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#define MBOX_A ((MBOX_T *)MBOX_A_BASE) /* address: 0x40009000 */
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#define MBOX_N ((MBOX_T *)MBOX_N_BASE) /* address: 0xA0003000 */
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/* user
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* - MBOX_A: app core is MBOX_USER0, net core is MBOX_USER1
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* - MBOX_N: app core is MBOX_USER1, net core is MBOX_USER0
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*/
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typedef enum {
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MBOX_USER0 = 0,
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MBOX_USER1 = 1,
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MBOX_USER_NUM = 2
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} MBOX_User;
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/* direction */
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typedef enum {
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MBOX_DIR_RX = 0,
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MBOX_DIR_TX = 1,
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MBOX_DIR_NUM = 2
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} MBOX_Direction;
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/* queue size */
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#define MBOX_QUEUE_SIZE 4
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/*
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* bit field definition of MBOX->FIFO_STATUS
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*/
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#define MBOX_QUEUE_FULL_BIT HAL_BIT(0)
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/*
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* bit field definition of MBOX->MSG_STATUS
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*/
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#define MBOX_QUEUE_MSG_NUM_SHIFT 0
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#define MBOX_QUEUE_MSG_NUM_VMASK 0x7
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/* MBOX->MSG */
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/*
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* bit field definition of MBOX->DEBUG
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*/
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#define MBOX_DEBUG_FIFO_CTRL_SHIFT 8
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#define MBOX_DEBUG_EN_BIT HAL_BIT(0)
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/******************************************************************************/
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void HAL_MBOX_Init(MBOX_T *mbox);
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void HAL_MBOX_DeInit(MBOX_T *mbox);
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void HAL_MBOX_EnableIRQ(MBOX_T *mbox);
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void HAL_MBOX_DisableIRQ(MBOX_T *mbox);
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void HAL_MBOX_QueueInit(MBOX_T *mbox, MBOX_User user, MBOX_Queue queue, MBOX_Direction dir);
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void HAL_MBOX_QueueDeInit(MBOX_T *mbox, MBOX_User user, MBOX_Queue queue, MBOX_Direction dir);
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void HAL_MBOX_QueueEnableIRQ(MBOX_T *mbox, MBOX_User user, MBOX_Queue queue, MBOX_Direction dir);
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void HAL_MBOX_QueueDisableIRQ(MBOX_T *mbox, MBOX_User user, MBOX_Queue queue, MBOX_Direction dir);
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int HAL_MBOX_QueueIsPendingIRQ(MBOX_T *mbox, MBOX_User user, MBOX_Queue queue, MBOX_Direction dir);
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void HAL_MBOX_QueueClrPendingIRQ(MBOX_T *mbox, MBOX_User user, MBOX_Queue queue, MBOX_Direction dir);
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int HAL_MBOX_QueueIsFull(MBOX_T *mbox, MBOX_Queue queue);
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uint32_t HAL_MBOX_QueueGetMsgNum(MBOX_T *mbox, MBOX_Queue queue);
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void HAL_MBOX_QueuePutMsg(MBOX_T *mbox, MBOX_Queue queue, uint32_t msg);
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uint32_t HAL_MBOX_QueueGetMsg(MBOX_T *mbox, MBOX_Queue queue);
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__STATIC_INLINE void HAL_MBOX_QueueEnableFIFO(MBOX_T *mbox, MBOX_Queue queue)
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{
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HAL_CLR_BIT(mbox->DEBUG, HAL_BIT((uint32_t)queue + MBOX_DEBUG_FIFO_CTRL_SHIFT));
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}
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__STATIC_INLINE void HAL_MBOX_QueueDisableFIFO(MBOX_T *mbox, MBOX_Queue queue)
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{
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HAL_SET_BIT(mbox->DEBUG, HAL_BIT((uint32_t)queue + MBOX_DEBUG_FIFO_CTRL_SHIFT));
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}
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__STATIC_INLINE void HAL_MBOX_EnableDebugMode(MBOX_T *mbox)
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{
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HAL_SET_BIT(mbox->DEBUG, MBOX_DEBUG_EN_BIT);
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}
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__STATIC_INLINE void HAL_MBOX_DisableDebugMode(MBOX_T *mbox)
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{
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HAL_CLR_BIT(mbox->DEBUG, MBOX_DEBUG_EN_BIT);
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}
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__STATIC_INLINE int HAL_MBOX_IsPmPatchEnabled(void)
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{
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return (HAL_GlobalGetChipVer() <= 0xB);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DRIVER_CHIP_HAL_MBOX_H_ */
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