103 lines
3.6 KiB
C
Executable File
103 lines
3.6 KiB
C
Executable File
/**
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* @file hal_rcosc_cali.h
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* @author XRADIO IOT WLAN Team
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*/
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/*
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* Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DRIVER_CHIP_HAL_RCOSC_CALI_H_
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#define _DRIVER_CHIP_HAL_RCOSC_CALI_H_
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#include "driver/chip/hal_def.h"
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#include "driver/chip/hal_prcm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define RCOCALI_CNT_TARGET_MASK (0x0FFFF)
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#define RCOCALI_RCO_DIVIDEND_MASK (0xFFFFFFFF)
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#define RCOCALI_DCXO_CNT_MASK (0x3FFFFF)
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#define RCOCALI_QUOTIENT_INVALID_FLAG (0x1<<0)
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#define RCOCALI_DENOMINATOR_INVALID_FLAG (0x1<<1)
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#define RCOCALI_PARAM_ERR_CLR (0x1<<2)
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#define RCOCALI_MONITOR_EN (0x1<<4)
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#define RCOCALI_ABNORMAL_FLAG_CLR (0x1<<5)
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#define RCOCALI_LONG_LEVEL_FOUND (0x1<<6)
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#define RCOCALI_GLITCH_FOUND (0x1<<7)
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#define RCOCALI_GLITCH_MAX_WIDTH_MASK (0x7F<<8)
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#define RCOCALI_LEVEL_MAX_WIDTH_MASK (0xFFFF<<16)
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#define RCOCALI_INT_CLR (0x1<<1)
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#define RCOCALI_INT_EN (0x1<<0)
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typedef struct {
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__IO uint32_t CNT_TARGET; /* , Address offset: 0x000 */
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__IO uint32_t DIVIDEND; /* , Address offset: 0x004 */
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__O uint32_t DCXO_CNT; /* , Address offset: 0x008 */
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__IO uint32_t ABNORMAL_MONITOR; /* , Address offset: 0x00C */
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__IO uint32_t INTERRUPT; /* , Address offset: 0x010 */
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} RCOCALI_CTRL_T;
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#define RCOCALI_CTRL ((RCOCALI_CTRL_T *)RCOSC_CALI_CTRL_BASE)
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/**
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* @brief RcoscCali initialization parameters
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*/
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typedef struct {
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uint32_t cnt_n;
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uint32_t out_clk;
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} RCOCALI_InitParam;
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/**
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* @brief RcoscCali configure parameters
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*/
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typedef struct {
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PRCM_RCOSC_WkModSel mode;
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PRCM_RCOSC_SCALE_PHASE2_WkTimes phase2_times;
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PRCM_RCOSC_SCALE_PHASE3_WkTimes phase3_times;
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uint8_t phase1_num;
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uint8_t phase2_num;
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uint16_t wup_time;
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} RCOCALI_ConfigParam;
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HAL_Status HAL_RcoscCali_Init(const RCOCALI_InitParam *param);
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HAL_Status HAL_RcoscCali_DeInit(void);
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HAL_Status HAL_RcoscCali_Config(const RCOCALI_ConfigParam *param);
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void HAL_RcoscCali_Start(void);
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void HAL_RcoscCali_Stop(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DRIVER_CHIP_HAL_RCOSC_CALI_H_ */
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