69 lines
1.6 KiB
C
69 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2014 Chen-Yu Tsai <wens@csie.org>
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*
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* Configuration settings for the Allwinner A23 (sun8i) CPU
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* Include common sunxi configuration where most the settings are
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*/
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#include <configs/sunxi-common.h>
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#ifdef CONFIG_SUNXI_UBIFS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_UBIFS
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#define CONFIG_MTD_UBI_WL_THRESHOLD 4096
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#define CONFIG_MTD_UBI_BEB_LIMIT 20
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#define CONFIG_CMD_UBI
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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/* Nand config */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x00
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/* MTD SUPPORT */
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#define MTDIDS_DEFAULT "nand0=nand"
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#define MTDPARTS_DEFAULT "mtdparts=nand:-(sunxi_nand_mtd)"
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#endif
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#define SUNXI_DMA_SECURITY
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/*
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* sun8iw18 specific configuration
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*/
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/*#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 50000000
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#define CONFIG_SF_DEFAULT_MODE (SPI_RX_DUAL|SPI_RX_QUAD)
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*/
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#ifdef CONFIG_USB_EHCI_HCD
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#define CONFIG_USB_EHCI_SUNXI
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#endif
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/* sram layout*/
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#define SUNXI_SRAM_A1_BASE (0x0)
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#define SUNXI_SRAM_A1_SIZE (0x10000)
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#define SUNXI_SYS_SRAM_BASE SUNXI_SRAM_A1_BASE
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#define SUNXI_SYS_SRAM_SIZE SUNXI_SRAM_A1_SIZE
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/*read non zero when cpu is secure*/
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#define SECURE_READ_TEST_REG 0x01C1E000
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#define CONFIG_SUNXI_USB_PHYS 2
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/* twi0 use the same pin with uart, the default use twi1 */
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#define CONFIG_SYS_SPD_BUS_NUM 1
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#define IR_BASE SUNXI_R_CIR_RX_BASE
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/*undefine coms that sun8iw18 doesnt have*/
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#undef CONFIG_SYS_NS16550_COM5
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#define CONFIG_SYS_BOOTM_LEN 0x2000000
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#endif /* __CONFIG_H */
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